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Search Publications by Richard A. Allen

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Displaying 1 - 25 of 130

Bonded Wafers for Three-Dimensional Integration

Author(s)
Richard A. Allen
Three-dimensional (3D) integration is a key enabling technology for compact, high-performance, and/or low-power electronics. This technology enables the

A ROUND ROBIN EXPERIMENT TO SUPPORT BOND VOID MEASUREMENT STANDARDS

Author(s)
Richard A. Allen, David T. Read, Victor H. Vartanian, Winthrop A. Baylies, William Kerr, Mark Plemmons, Kevin T. Turner
A round robin experiment to compare the sensitivities of various metrology tools to small voids between bonded wafers such as are used in three-dimensional

Metrology Needs for 2.5D/3D Interconnect

Author(s)
Victor H. Vartanian, Richard A. Allen, Klaus Humler, Steve Olsen, Brian Sapp, Larry Smith
This chapter will focus on the metrology steps to support 2.5D and 3D reference flows employing via-mid copper through-silicon via (TSV) processing, wafer

Metrology for 3D Integration

Author(s)
Richard A. Allen, Victor H. Vartanian, David T. Read, Winthrop A. Baylies
Three-dimensional stacked integrated circuit (3DS-IC) fabrication requires complex technologies such as high-aspect ratio through- silicon vias (TSVs), wafer

Metrology Needs for TSV Fabrication

Author(s)
Victor H. Vartanian, Richard A. Allen, Larry Smith, Klaus Hummler, Steve Olson, Brian Sapp
This paper focuses on the metrology needs and challenges of through silicon via (TSV) fabrication, consisting of TSV etch, liner, barrier, and seed (L/B/S)

Detection of 3D Interconnect Bonding Voids by IR Microscopy

Author(s)
Jonny H?glund, Zoltan Kiss, Gyorgy Nadudvari , Zsolt Kovacs, Szabolcs Velkei, Moore Chris, Victor H. Vartanian, Richard A. Allen
There are a number of factors driving 3D integration including reduced power consumption, RC delay, and form factor as well as increased bandwidth. However

TSV Reveal height and bump dimension metrology by the TSOM method

Author(s)
Ravikiran Attota, Haesung Park, Victor H. Vartanian, Ndubuisi G. Orji, Richard A. Allen
Through-focus scanning optical microscopy (TSOM) transforms conventional optical microscopes into truly 3D metrology tools for nanoscale- to- microscale

The MEMS 5-in-1 Test Chips (Reference Materials 8096 and 8097)

Author(s)
Janet M. Cassard, Jon C. Geist, Craig D. McGray, Richard A. Allen, Muhammad Y. Afridi, Brian J. Nablo, Michael Gaitan, David G. Seiler
This paper presents an overview of the Microelectromechanical Systems (MEMS) 5-in-1 Reference Material (RM), which is a single test chip with test structures

Test Structure Fundamentals

Author(s)
Richard A. Allen
Test structures are critical tools for semiconductor manufacturers, allowing for understanding of the process and individual circuit elements that cannot be

Nano- and Atom-scale Length Metrology

Author(s)
Theodore V. Vorburger, Ronald G. Dixson, Ndubuisi G. Orji, Joseph Fu, Richard A. Allen, Michael W. Cresswell, Vincent A. Hackley
Measurements of length at the nano-scale have increasing importance in manufacturing, especially in the electronics and biomedical industries. The properties of

A ROUND ROBIN EXPERIMENT TO PROVIDE PRECISION AND BIAS FOR SEMI MS5: TEST METHOD FOR WAFER BOND STRENGTH MEASUREMENTS USING MICRO-CHEVRON TEST STRUCTURES

Author(s)
Richard A. Allen, Winthrop A. Baylies, Paul Langer, Ralph Danzl, Frank W. DelRio, Gavin Horn, Roy Knechtel, Michael Mattes, David T. Read, Sumant Sood, Kevin T. Turner
An international round robin was organized to update SEMI Standard MS5: Test Method for Wafer Bond Strength Measurements using Micro-Chevron Test Structures