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NOTICE OF FUNDING OPPORTUNITY (NOFO)
On February 28, 2024, the Department of Commerce issued a NOFO to seek applications for research and development (R&D) activities that will establish and accelerate domestic capacity for advanced packaging substrates and substrate materials, a key technology for manufacturing semiconductors.
Mandatory concept papers for this funding opportunity were due on April 12, 2024.
Concept papers received after this deadline will not be reviewed or considered. Review of the concept papers and feedback to applicants is expected to be completed on or about May 10, 2024.
Please visit the CHIPS R&D funding page for information on other opportunities.
“Advanced packaging” refers to many chips with diverse functions assembled tightly together on a substrate in two or three dimensions at extremely fine dimensions. This method achieves function, performance, and power savings far greater than can be achieved with conventionally packaged chips on a printed circuit board. Recent advances in artificial intelligence, for example, would not be possible without advanced packaging.
Advanced packaging can be a transformative capability that helps U.S. manufacturers compete globally, but there are many technological challenges to solve. The CHIPS Research and Development Office has established the CHIPS National Advanced Packaging Manufacturing Program to address these challenges, including:
- How do we design and assemble chips so tightly that they behave like a single traditional large chip, but with the production efficiency and cost savings of advanced packaging?
- How do we supply power to and dissipate heat from such tightly coupled assemblies?
- How do we test and repair such complex assemblies?
- How do we ensure their reliability since traditional methods of visual inspection cannot be performed on such small, tightly packaged dimensions?
Investments in semiconductors will not succeed without investments in advanced packaging. The CHIPS and Science Act offers a once-in-a-generation opportunity to establish a domestic competitive advanced packaging capability in semiconductor manufacturing.
In addition, the CHIPS NAPMP will help train semiconductor personnel and students in relevant technologies and feed these developments into domestic manufacturing facilities. The CHIPS NAPMP will work closely with the CHIPS National Semiconductor Technology Center, the semiconductor-related CHIPS Manufacturing USA Program, the CHIPS Metrology Program, and U.S. industry and academia to make this vision a reality.
The CHIPS NAPMP will enable the development of a robust domestic advanced packaging ecosystem by:
- Establishing an advanced packaging piloting facility (or facilities) that accelerates the transfer of innovations in packaging, equipment, and process development into manufacturing;
- Driving the development of digital tools to reduce the time and cost of advanced packaging engineering; and,
- Establishing and supporting partnerships among industry, academia and training entities, and government to contribute to an advanced packaging workforce.
The six priority research investment areas of the CHIPS NAPMP are:
- Materials and substrates
- Equipment, tools, and processes
- Power delivery and thermal management for advanced packaging assemblies
- Photonics and connectors that communicate with the outside world
- A chiplet ecosystem
- Co-design of multi-chiplet systems with automated tools
Learn more from the CHIPS NAPMP vision paper, and sign up for updates from CHIPS to be informed of upcoming CHIPS NAPMP programs, events, and funding opportunities.