The following questions and answers apply to the CHIPS CARISSMA Notice of Funding Opportunity,released on October 30, 2024. For questions about the NOFO, eligibility requirements, evaluation and award criteria, selection process, and the general characteristics of a competitive application, email research [at] chips.gov (research[at]chips[dot]gov) with “025-NIST-CHIPS-AIAE_Sustainability-01 Questions” in the subject line.
Questions are strongly encouraged by December 30, 2024 in order to ensure a timely response prior to the January 13, 2024 concept paper deadline.
We will update these FAQs regularly to incorporate answers to new questions we receive.
For additional guides and materials for CHIPS R&D Funding Opportunities, please click here.
The application process consists of a mandatory concept paper and a full application. Full applications will only be accepted from applicants invited after the concept paper stage.
This NOFO seeks applications for industry-informed, university-based AI/AE collaborations, including research and development, education and workforce development, and related activities relevant to sustainable semiconductor materials and processes.
If successful, awards made under this NOFO will support the long-term viability of next-generation domestic semiconductor manufacturing, accelerating the discovery, design, synthesis, and adoption of materials and processes, and the development of new researchers needed to meet the industry’s technology, economic, and sustainability goals.
Mandatory concept papers are due January 13, 2025.
The full application deadline will be communicated to invited applicants at the time of invitation
The CHIPS R&D will host an informational webinar on November 8, 2024 to provide general information regarding this NOFO, offer general guidance on preparing applications, and answer questions.
You can register for the webinar here.
Concept papers will be accepted only through Grants.gov. Concept papers must be received at Grants.gov no later than 11:59 p.m. Eastern Time, on January 13, 2025. Concept papers received after the specified deadline will not be reviewed or considered.
Eligible applicants may submit only one concept paper and, if invited, one full application.
CHIPS R&D is unable to provide feedback on concept papers while the competition is on-going.
Letters of Commitment are no required. However, where feasible, applicants are encouraged to include letters of commitment from potential private sector partners indicating interest in the funded innovation and the potential for industry to rapidly move funded innovations, if successfully demonstrated, to higher TRL levels
Letters of interest are optional and, where included, should indicate willingness from any third party to support this proposed effort
Letters of interest do not contribute to the concept paper narrative page limit
Full applications will be accepted only from those applicants invited after concept paper evaluation. Full application deadlines will be communicated to invited applicants at the time of invitation.
CHIPS R&D is unable to provide feedback on concept papers while the competition is on-going.
This NOFO identifies strict limitations on page counts for the concept paper and, where invited, a full application. The applicant should refer to Table 3 and Table 4 in the NOFO to determine which documents and forms are included and excluded in page count limits for concept papers and full applications, respectively.
Yes. Eligible subrecipients may be included in more than one application.
CHIPS for America makes a Teaming Partner List available at https://www.nist.gov/chips/chips-america-teaming-partner-list.
On November 8, 2024, CHIPS R&D hosted an informational webinar for the CARISSMA NOFO to answer questions and provide general guidance on preparing applications in accordance with the requirements set out in the NOFO. Slides from the webinar are posted here. Additionally, on November 15, 2024, CHIPS R&D hosted a Proposers' Day Meeting for prospective applicants. Slides from the meeting can be found here.
Under the CARISSMA NOFO, projects may apply to more than one material class or application relevant to semiconductor manufacturing.
Applicants are not required to become members of the CHIPS National Semiconductor Technology Center.
Yes, applicants may propose to collaborate with NIST. In accordance with section 6.2.3 of the NOFO, if an applicant proposes such collaboration, the statement of work must include a statement of this intention, a description of the collaboration, and prominently identify the NIST employee(s) involved, if known. Any collaboration by a NIST employee must be approved by appropriate NIST management. Prior to beginning the merit review process, NIST will verify the approval of the proposed collaboration. Any unapproved collaboration will be stricken from the application prior to the merit review. As stated in section 6.2.3 of the NOFO, any collaboration with an identified NIST employee that is approved by appropriate NIST management will not make an application more or less favorable in the competitive process.
An eligible applicant, for example, an ERI, may submit only one concept paper, regardless of the faculty member(s) named by the eligible applicant as Principal Investigator(s) or co-Principal Investigator(s). There is no restriction on the number of applications in which eligible applicants may be included as subrecipients, as well as no restrictions on listing an individual faculty member who may serve as Principal Investigator or co-Principal Investigator as a named subrecipient in an application.
CHIPS R&D anticipates a total Federal commitment of up to approximately $100 million, with multiple awards in amounts ranging from approximately $20 million to $40 million per award.
Construction activities are not an allowable cost with Federal funds under this NOFO. However, costs related to internal modifications of existing buildings that may be necessary to carry out the proposed research tasks may be allowed, at determined by NIST in its sole discretion.
Non-federal cost share is not required in this program.
However, CHIPS R&D encourages applicants to detail in their applications opportunities for optional co-investment, which may include industry-provided expertise, intellectual property, facility access, or other forms of partner co-investment during the award period of performance
No, NIST expects the Award Recipient to disburse payment to any subrecipients or contractors that perform part of the project scope of work under the Award. Please refer to section 3.1.1. of the NOFO for information regarding requirements pertaining to FFRDCs. Any subawards will contain flow-down terms from the Award.
If an application under the CARISSMA NOFO for a multi-year award is approved, funding will be provided only for the first phase of the project. Funding for subsequent phases will be contingent upon the recipient’s satisfactory performance, including milestones and project deliverables over the period of performance set out in the award. See sections 1.4.5 and 2.1.2 of the NOFO for more information.
Domestic accredited institutions of higher education and domestic non-profit or for-profit organizations that manage consortia of accredited institutions of higher education are eligible to apply for this NOFO.
A domestic entity is one that is incorporated within the United States (including a U.S. territory) with its principal place of business in the United States (including a U.S. territory).
Eligible subrecipients include accredited institutions of higher education; for-profit organizations or non-profit organizations; State, local, territorial, and Tribal governments; Federally Funded Research and Development Centers; Federal entities; foreign partners; and other entities that are eligible to participate as applicants under this NOFO.
CHIPS R&D strongly encourages applications from multi-disciplinary, multi-organization project teams that collectively demonstrate the full range of expertise, experience, and development capabilities needed to achieve the objectives of this NOFO.
As provided in section 3.1 of the CARISSMA NOFO, an entity leading an application for funding must be a domestic entity that is incorporated within the United States (including a U.S. territory) with its principal place of business in the United States (including a U.S. territory). In accordance with section 3.1.4 of the NOFO, subject to CHIPS R&D review and written approval, a foreign organization may participate as a member of a project team, as a subrecipient or a contractor, provided that the entity is not a “foreign entity of concern” as that term is defined in 15 U.S.C. § 4651(8).. See section 3.1.4 of the NOFO for more information regarding the participation of foreign entities.
No, a Federally Funded Research and Development Center (FFRDC) is not an eligible applicant under the CARISSMA NOFO. However, an FFRDC may participate in an award as a subrecipient or as a contractor, to the extent allowed by law, based on the unique and specific needs of the proposed project. See section 3.1.1 for information on documentation that must be included in applications in connection with FFRDCs.
Yes, new semiconductors are in scope for the CARISSMA program.
The application of artificial intelligence-powered autonomous experimentation (AI/AE) refers to the combination of automated (robotic) hardware for materials synthesis and characterization, AI-powered software and models, and data acquisition, analysis, computational resources, and storage hardware that plan, execute, and evaluate experiments in autonomous closed loops to achieve accelerated research objectives supplied by human researchers.
As described in section 1.1.2 of the NOFO, the objectives of the CARISSMA program are to:
1. Accelerate research into and delivery of targeted, industry-relevant, sustainable semiconductor materials and processes through the application of AI/AE;
2. Propagate models for incorporating sustainability metrics into semiconductor industry materials design and discovery, in addition to continued advancement in power, performance, area, cost, or other relevant technology metrics;
3. Expand the capabilities of emerging research institutions (ERIs) and other emerging R&D participants through cohesive innovative teams of universities, industry, government labs, and other stakeholders; and
4. Build an exceptional workforce of university graduates and faculty with AI/AE R&D expertise.
If an applicant believes the proposed research will meet these objectives and other requirements listed in the NOFO, including but not limited to the co-optimization targets listed in section 1.4.3 of the NOFO, CHIPS R&D encourages them to submit a concept paper for consideration.
As described in section 1.1.2 of the NOFO, the objectives of the CARISSMA program are to:
1. Accelerate research into and delivery of targeted, industry-relevant, sustainable semiconductor materials and processes through the application of AI/AE;
2. Propagate models for incorporating sustainability metrics into semiconductor industry materials design and discovery, in addition to continued advancement in power, performance, area, cost, or other relevant technology metrics;
3. Expand the capabilities of emerging research institutions (ERIs) and other emerging R&D participants through cohesive innovative teams of universities, industry, government labs, and other stakeholders; and
4. Build an exceptional workforce of university graduates and faculty with AI/AE R&D expertise.
If an applicant believes the proposed research will meet these objectives and other requirements listed in the NOFO, including but not limited to the co-optimization targets listed in section 1.4.3 of the NOFO, CHIPS R&D encourages them to submit a concept paper for consideration.
As described in section 1.1.2 of the NOFO, the objectives of the CARISSMA program are to:
1. Accelerate research into and delivery of targeted, industry-relevant, sustainable semiconductor materials and processes through the application of AI/AE;
2. Propagate models for incorporating sustainability metrics into semiconductor industry materials design and discovery, in addition to continued advancement in power, performance, area, cost, or other relevant technology metrics;
3. Expand the capabilities of emerging research institutions (ERIs) and other emerging R&D participants through cohesive innovative teams of universities, industry, government labs, and other stakeholders; and
4, Build an exceptional workforce of university graduates and faculty with AI/AE R&D expertise.
If an applicant believes the proposed research will meet these objectives and other requirements listed in the NOFO, including but not limited to the co-optimization targets listed in section 1.4.3 of the NOFO, CHIPS R&D encourages them to submit a concept paper for consideration.
As described in section 1.1.2 of the NOFO, the objectives of the CARISSMA program are to:
1. Accelerate research into and delivery of targeted, industry-relevant, sustainable semiconductor materials and processes through the application of AI/AE;
2. Propagate models for incorporating sustainability metrics into semiconductor industry materials design and discovery, in addition to continued advancement in power, performance, area, cost, or other relevant technology metrics;
3. Expand the capabilities of emerging research institutions (ERIs) and other emerging R&D participants through cohesive innovative teams of universities, industry, government labs, and other stakeholders; and
4. Build an exceptional workforce of university graduates and faculty with AI/AE R&D expertise.
If an applicant believes the proposed research will meet these objectives and other requirements listed in the NOFO, including but not limited to the co-optimization targets listed in section 1.4.3 of the NOFO, CHIPS R&D encourages them to submit a concept paper for consideration.
As described in section 1.1.2 of the NOFO, the objectives of the CARISSMA program are to:
1. Accelerate research into and delivery of targeted, industry-relevant, sustainable semiconductor materials and processes through the application of AI/AE;
2. Propagate models for incorporating sustainability metrics into semiconductor industry materials design and discovery, in addition to continued advancement in power, performance, area, cost, or other relevant technology metrics;
3. Expand the capabilities of emerging research institutions (ERIs) and other emerging R&D participants through cohesive innovative teams of universities, industry, government labs, and other stakeholders; and
4. Build an exceptional workforce of university graduates and faculty with AI/AE R&D expertise.
If an applicant believes the proposed research will meet these objectives and other requirements listed in the NOFO, including but not limited to the co-optimization targets listed in section 1.4.3 of the NOFO, CHIPS R&D encourages them to submit a concept paper for consideration.
An emerging research institute (ERI) is an institution of higher education with an established undergraduate or graduate program that conducts less than $50 million per year in Federal research expenditures.
No, but successful applicants should demonstrate strong partnerships among one or more Emerging Research Institutions.
Project teams must include faculty from one or more ERIs serving as a Principal Investigator or co-Principal Investigator.
The U.S. Department of Energy has compiled a list of emerging research institutions, which is available here.