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Advanced Electronics Group

The Group seeks to develop the critical metrologies that will be needed in the future to understand the fundamental physics and enable advanced manufacturing of nanoscale devices at the 3 nm node and beyond.

We develop new modes of spectrographic imaging or spatial resolved measurements using electrons, photons, electric or magnetic fields, or proximal probes down to the atomic scale in ambient, operating and in vivo environments. We apply Nanoscale Imaging to characterize nanoscale devices and nanostructured materials to study their physics, structure and function.

News and Updates

Projects and Programs

Advancing PEEM-based Metrology

Ongoing
With the rise of emergent material systems, nanoscale devices and components, there is a need to assess their electronic properties at similar length scales. Bulk-sensitive measurements provide characteristic information averaged over the sample or device, and these properties may not be uniform

Advancing Power Electronics with Defect Metrology

Ongoing
Power electronics play a central role in all aspects of electrical energy storage, distribution, conversion, and consumption. Currently, power electronics heavily rely on Si-based insulated-gate bipolar transistors (IGBT), which have large footprints, are inefficient, and require extensive cooling

DUV/EUV Nanoscopy for Imaging Nanostructures

Ongoing
Novel optical nanoscopy techniques using deep-ultraviolet (DUV) and extreme-ultraviolet (EUV) laser sources are developed to characterize nanostructures with high dimensional sensitivity and low uncertainty for advancing the semiconductor devices manufacturing process. The illumination beam is

Electrical Characterization of Nanoscale Electron Devices

Ongoing
Over the decades, many measurement methods were developed to meet the needs of advancing electron device/circuit/system technology. As technology continue to advance, new needs continue to surface, either due to old measurements are no longer adequate or due to no established method exists. A case

Publications

A 4-mW 2.2-6.9 GHz LNA in 16nm FinFET Technology for Cryogenic Applications

Author(s)
Runzhou Chen, Hamdi Mani, Phil Marsh, Richard Al Hadi, Pragya Shrestha, Jason Campbell, Christopher Chen, Hao-Yu Chen, Kosmas Galatsis, Mau-Chung Frank Chang
This work presents the design and measurement of a low-power wide-band cryogenic low-noise amplifier (LNA) that operates in a wide temperature range using 16nm

Awards

2023 IEEE EDS Leo Esaki Award

For recognizing the best paper appearing in a fast turnaround archival publication of the IEEE Electron Devices Society, targeted to the

Press Coverage

Research Bits: Dec. 13

Semiconductor Engineering
Engineers at Caltech and the University of Southampton integrated an electronic and photonic chip for high-speed communication in data centers.

Contacts

Group Leader

General Information