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Search Publications by: Jose Ortiz (Assoc)

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Displaying 1 - 15 of 15

Electro-thermal Simulation of 1200 V 4H-SiC MOSFET Short-Circuit SOA

May 10, 2015
Author(s)
Tam H. Duong, Jose M. Ortiz, David W. Berning, Allen R. Hefner Jr., Sei-Hyung Ryu, John W. Palmour
The purpose of this paper is to introduce a dynamic electro-thermal simulation and analysis approach for device design and short-circuit safe-operating-area (SOA) characterization using a physics-based electro-thermal Saber®* model. Model parameter

Physics-based Electro-thermal Saber Model and Parameter Extraction for High-Voltage SiC Buffer IGBTs

September 15, 2014
Author(s)
Tam H. Duong, Allen R. Hefner Jr., Jose M. Ortiz, Sei-Hyung Ryu , Edward VanBrunt, Lin Cheng, Scott Allen, John W. Palmour
The purpose of this paper is to present a physics-based electro-thermal Saber model and parameter extraction sequence for high-voltage SiC buffer layer n-channel insulated gate bipolar transistors (IGBTs). This model was developed by modifying and

Comparison of 4.5 kV SiC JBS and Si PiN Diodes for 4.5 kV Si IGBT Anti-parallel Diode Applications

March 10, 2011
Author(s)
Tam H. Duong, Allen R. Hefner Jr., Karl Hobart, Sei-Hyung Ryu, David Grider, David W. Berning, Jose M. Ortiz, Eugene Imhoff, Jerry Sherbondy
A new 60 A, 4.5 kV SiC JBS diode is presented and its performance is compared to Si PiN diodes used as the anti-parallel diode for 4.5 kV Si IGBTs. The current-voltage, capacitance-voltage, reverse recovery, and reverse leakage characteristics of both

Computer-Controlled Thermal Cycling Tool to Aid in SiC Module Package Characterization

June 30, 2010
Author(s)
Madelaine H. Hernandez, Jose M. Ortiz, Brian J. Grummel, Allen R. Hefner Jr., David W. Berning, Colleen E. Hood, Patrick McCluskey
A software-controlled thermal cycling test system developed for SiC module package characterization is presented. Its interface permits the flexible definition of testing parameters like variable data acquisition rates and customizable cycle transitions

Electro-Thermal Simulation of a 100 A, 10 kV Half-Bridge SiC MOSFET/JBS Power Module

June 13, 2008
Author(s)
Tam H. Duong, Jose M. Ortiz, R. N. Raju, Allen R. Hefner Jr.
This paper presents the results from a parametric simulation study that was conducted to optimize the performance of 100 A, 10 kV, 20 kHz half-bridge SiC MOSFET/JBS power modules. The power modules are being developed by the DARPA WBGS-HPE Phase II program

Thermal Network Component Models for 10 kV SiC Power Module Packages

June 13, 2008
Author(s)
Jose M. Ortiz, Madelaine H. Hernandez, Tam H. Duong, Scott G. Leslie, Allen R. Hefner Jr.
The DARPA WBGS-HPE program is developing 100 A, 10 kV SiC power modules to demonstrate the viability of a 2.75 MVA Solid State Power Substation that uses 10 kV, 20 kHz switching-capable devices. Thermal network component models for these modules are

High-Voltage Isolated Gate Drive Circuit for 10 kV, 100 A SiC MOSFET/JBS Power Modules

June 2, 2008
Author(s)
David W. Berning, Tam H. Duong, Jose M. Ortiz, Angel Rivera, Allen R. Hefner Jr.
A high-current, high-voltage-isolated gate drive circuit developed for characterization of high-voltage, high-frequency 10 kV, 100 A SiC MOSFET/JBS half-bridge power modules is presented and described. Gate driver characterization and simulation have shown

Circuit Simulation Model for a 100 A, 10 kV Half-bridge SiC MOSFET/JBS Power Module

February 24, 2008
Author(s)
Tam H. Duong, Angel Rivera-Lopez, Allen R. Hefner Jr., Jose M. Ortiz
This paper presents the simulation of a 100 A, 10 kV Silicon Carbide (SiC) half-bridge power module operating at 20 kHz in a behavioral boost converter circuit. In the half-bridge module, 10 kV SiC power MOSFETs are used as the upper and lower switches

Experimental Evaluation of SiC PiN Diode Forward Bias Degradation and Long Term Stability

June 21, 2007
Author(s)
Madelaine H. Hernandez, Adwoa Akuffo, Colleen E. Hood, Jose M. Ortiz, Allen R. Hefner Jr.
New automated metric systems and procedures have been developed and introduced in order to evaluate the long stability of SiC PiN diodes, and long term stability results are presented for 10 kV SiC PiN diodes that are made using a new low degradation

High-Voltage, High-Frequency SiC Power MOSFETs Model Validation

June 21, 2007
Author(s)
Jose M. Ortiz, Tam H. Duong, Angel Rivera-Lopez, Allen R. Hefner Jr.
Simulated results for techniques used to validate the on-state, resistive load switching, inductive load switching, and high voltage depletion capacitance performance for 4H-SiC power MOSFETs are presented. The validation is performed using a script