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High-Voltage, High-Frequency SiC Power MOSFETs Model Validation

Published

Author(s)

Jose M. Ortiz, Tam H. Duong, Angel Rivera-Lopez, Allen R. Hefner Jr.

Abstract

Simulated results for techniques used to validate the on-state, resistive load switching, inductive load switching, and high voltage depletion capacitance performance for 4H-SiC power MOSFETs are presented. The validation is performed using a script written in AIM language incorporated in the Saber? circuit simulator. Data from the IMPACT tools and from laboratory measurements is compared against the circuit simulator models output. Measured versus simulated results are presented for different samples of 10-kV SiC power MOSFET device designs produced by Cree Inc. during Phase 2 of the DARPA Wide Band-gap Semiconductor Technology High Power Electronics (WBST-HPE) program.
Proceedings Title
Proc., Power Electronics Specialist Conference
Conference Dates
June 17-21, 2007
Conference Location
Orlando, FL, USA
Conference Title
Power Electronics Specialist Conference

Keywords

4H-SiC power MOSFETs, models, silicon cabide, Simulated, validation

Citation

Ortiz, J. , Duong, T. , Rivera-Lopez, A. and Hefner Jr., A. (2007), High-Voltage, High-Frequency SiC Power MOSFETs Model Validation, Proc., Power Electronics Specialist Conference, Orlando, FL, USA, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=32669 (Accessed December 15, 2024)

Issues

If you have any questions about this publication or are having problems accessing it, please contact reflib@nist.gov.

Created June 20, 2007, Updated October 12, 2021