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Electronics

Semiconductors

Search Publications

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Displaying 1 - 25 of 748

Material Needs and Measurement Challenges for Advanced Semiconductor Packaging: Understanding the Soft Side of Science

August 27, 2025
Author(s)
Ran Tao, Polette Centellas, Stian Romberg, Anthony Kotula, Gale Holmes, Amanda Forster, Christopher Soles, Bob Allen, Edvin Cetegen, William Chen, Jeff Gotro, Mark Poliks
This perspective builds upon insights from the National Institute of Standards and Technology (NIST)-organized workshop, "Materials and Metrology Needs for Advanced Semiconductor Packaging Strategies," held at the 35th annual Electronics Packaging

Fully transparent GaN/InGaN LED as a position sensitive detector

August 11, 2025
Author(s)
Christine McGinn, Keith Behrman, Emily Bittle, Pragya Shrestha, Qingyuan Zeng, Vikrant Kumar, Christina Hacker, Ioannis Kymissis
Commercial imaging technologies have an increasing need for an accurate, in-situ beam locator to ensure laser alignment during operation. In this work, gallium nitride LED with indium gallium nitride quantum wells is leveraged is leveraged to create a

Large Area Real-Space Crystallography and Thickness Determination of Mesoscopic Semiconductor Membranes Using Zone Axis Patterns, Cold Field-Emission SEM/STEM, and Analytical S/TEM

July 25, 2025
Author(s)
Vladimir Oleshko, Glenn Holland, Daron Westly, John Villarrubia
Structural and dimensional characterization of layered structures in semiconductors is increasingly important for microelectronics manufacturing because of the continuing downward scaling of devices. Manufacturers require high-precision non-destructive

Impact of near interface defects on NO annealed SiC MOSFET mobility

July 2, 2025
Author(s)
Yu Xin Wen, Bing-Yue Tsui, Kin Cheung
A series of recent studies asserted that near-interface-traps (NITs) are introduced by the post-oxidation NO annealing process and these NITs are the cause for the low mobility of NO annealed SiC MOSFETs. We use fast Id-Vg measurement to directly probe

Analyzing Collusion Threats in the Semiconductor Supply Chain

June 30, 2025
Author(s)
Sanjay Rekhi, Kostas Amberiadis, Abir Ahsan Akib, Ankur Srivastava
In this work, we propose a comprehensive framework to analyze threats related to semiconductor supply chain. The framework introduces a metric which quantifies the severity of different threats subjected to a collusion of adversaries from different stages

Microscopic-scale defect analysis on b-Ga2O3 through microscopy

June 12, 2025
Author(s)
Minyeong Kim, Andrew Winchester, Alline Myers, Edwin Heilweil, Ory Maimon, Wei-Chang Yang, Sang-Mo Koo, Qiliang Li, Sujitra Pookpanratana
β-Ga2O3 is a wide bandgap semiconductor with potential for surpassing current-generation high-power device performance and cost-effectiveness, due to its unique properties and availability of large high-quality substrates. However, β-Ga2O3 power

Elucidating the thermal properties and anomalous transport in the 18R polytype of SnSe2

May 30, 2025
Author(s)
Oluwagbemiga Ojo, Wilarachchige D. C. B. Gunatilleke, Winnie Wong-Ng, Tieyan Chang, Yu-Sheng Chen, Joshua Martin, Adam Biacchi, George Nolas
The 18R polytype of SnSe2 possesses unique structural features that can directly impact the transport properties and potential applications of interest; however, a comprehensive understanding of the intrinsic physical properties is lacking. We grew large

Lab-based multi-wavelength EUV diffractometry for critical dimension metrology

April 24, 2025
Author(s)
Bryan Barnes, Aaron Chew, Nicholas Jenkins, Yunzhe Shao, Martin Sohn, Regis Kline, Daniel Sunday, Purnima Balakrishnan, Thomas Germer, Steven Grantham, Clay Klein, Stephanie Moffitt, Eric Shirley, Henry Kapteyn, MARGARET MURNANE
Background: The industry is developing extreme-ultraviolet wavelength (EUV) techniques to measure critical dimensions (CDs) in logic fabrication. As nascent approaches are unveiled, evaluations against reference metrologies are essential to motivate

Sampling from exponential distributions in the time domain with superparamagnetic tunnel junctions

April 22, 2025
Author(s)
Temitayo Adeyeye, Sidra Gibeault, Daniel Lathrop, Matthew Daniels, Mark Stiles, Jabez McClelland, William Borders, Jason Ryan, Philippe Talatchian, Ursula Ebels, Advait Madhavan
Though exponential distributions are ubiquitous in statistical physics and related computational models, sampling them from device behavior is rarely done. The superparamagnetic tunnel junction (SMTJ), a key device in probabilistic computing, shows

Impact-Ionization-Based High-Endurance One-Transistor Bulk CMOS Cryogenic Memory

March 31, 2025
Author(s)
Pragya Shrestha, Alexander Zaslavsky, Valery Ortiz Jimenez, Jason Campbell, Curt Richter
This paper presents a high-endurance capacitorless one-transistor (1T) cryogenic memory, fabricated in a 180 nm bulk CMOS technology, with a high memory window of (107 I1/I0 sense current ratio) and prolonged retention. The memory is enabled by the

Thermal properties and ultra-low thermal conductivity of Zn2GeSe4

March 11, 2025
Author(s)
Oluwagbemiga Ojo, Wilarachchige Gunatilleke, Adam Biacchi, Hsin Wang, George Nolas
Materials-related discovery continues to drive advancements in technologically significant fields of interest. Moreover, an understanding of the thermal properties of materials is essential for any application of interest. Here, we report on the structural

High-endurance bulk CMOS one-transistor cryo-memory

February 28, 2025
Author(s)
Alexander Zaslavsky, Pragya Shrestha, Valery Ortiz Jimenez, Jason Campbell, Curt Richter
Previously we reported a compact one-transistor (1T) 180 nm bulk CMOS cryo-memory with a high 10^7 I_1/I_0 memory window and long 800 s retention time based on impact-ionization-induced charging of the transistor body. Here, we present the endurance and

On the response time constant of interface defects

January 21, 2025
Author(s)
Kin Cheung, Yu Xin Wen, Bing-Yue Tsui
Interface defect response time is a key parameter in some common electrical measurements of MOS devices, most notably the hi-lo CV measurement as well as the conductance measurement. A long established believe is that interface defects at energies close to

A 4-mW 2.2-6.9 GHz LNA in 16nm FinFET Technology for Cryogenic Applications

December 9, 2024
Author(s)
Runzhou Chen, Hamdi Mani, Phil Marsh, Richard Al Hadi, Pragya Shrestha, Jason Campbell, Christopher Chen, Hao-Yu Chen, Kosmas Galatsis, Mau-Chung Frank Chang
This work presents the design and measurement of a low-power wide-band cryogenic low-noise amplifier (LNA) that operates in a wide temperature range using 16nm FinFET technology. The LNA is packaged and measured at both room and cryogenic temperatures. It

Correlation of Structure and Morphology in an Ethylene-glycol Side-chain Modified Polythiophene via Combined X-ray Scattering and Four-dimensional Scanning Transmission Electron Microscopy

October 10, 2024
Author(s)
Andrew Herzing, Lucas Flagg, Chad R. Snyder, Lee Richter, Jonathan Onorato, Christine Luscombe, Ruipeng Li
We report the results of a combined grazing incidence wide-angle X-ray scattering (GIWAXS) and four-dimensional scanning transmission microscopy (4D-STEM) analysis of the effects of thermal processing on poly(3[2-(2-methoxyethoxy)ethoxy]-methylthiophene- 2
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