High-endurance bulk CMOS one-transistor cryo-memory

Published

February 28, 2025

Author(s)

Alexander Zaslavsky, Pragya Shrestha, Valery Ortiz Jimenez, Jason Campbell, Curt Richter

Abstract

Previously we reported a compact one-transistor (1T) 180 nm bulk CMOS cryo-memory with a high 10^7 I_1/I_0 memory window and long 800 s retention time based on impact-ionization-induced charging of the transistor body. Here, we present the endurance and retention characteristics of our 1T memory obtained from high-speed measurements at T = 7 K. We observe excellent endurance, with no visible degradation over 10^9 write 1/write 0 cycles. The measured retention time varies with the memory window and the leakage current, but it exceeds 10 s for a 30X I_1/I_0 memory window and would be even higher in a device with no substrate contract.

Citation

Solid-State Electronics

Volume

226

Pub Type

Journals

Download Paper

https://doi.org/10.1016/j.sse.2025.109097

Local Download

Keywords

Cryogenic Electronics, memory, cryomemory, CMOS, semiconductor, quantum information science

Citation

Zaslavsky, A. , Shrestha, P. , Ortiz Jimenez, V. , Campbell, J. and Richter, C. (2025), High-endurance bulk CMOS one-transistor cryo-memory, Solid-State Electronics, [online], https://doi.org/10.1016/j.sse.2025.109097, https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=957939 (Accessed October 7, 2025)