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Displaying 26 - 50 of 699

POTENT: Post-Synthesis Obfuscation for Secure Network-on-Chip Architectures

November 5, 2024
Author(s)
Kostas Amberiadis, Dipal Halder, Sandip Ray, Yuntao Liu, Ankur Srivastava
We develop a novel post-synthesis obfuscation technique, POTENT, to protect NoC fabrics against reverse engineering attacks. POTENT integrates programmable switches at NoC routers, concealing topology and communication paths under a dynamically controlled

Terahertz On-wafer mTRL Calibration Kits For Microelectronics Characterization

October 7, 2024
Author(s)
Jerome Cheron, Robert Jones, Bryan Bosworth, Jeffrey Jargon, Benjamin Jamroz, Ari Feldman
We report accurate small-signal measurements of heterojunction-bipolar-transistors (HBTs) that are characterized with two on-wafer multiline thru-reflect-line (mTRL) calibration kits. The first calibration kit is designed with thin-film microstrip

Summary Report: CHIPS R&D Program Standards Summit

September 27, 2024
Author(s)
Mary Bedner, Chris Greer
The mission of the National Institute of Standards and Technology's (NIST) CHIPS Research and Development Office (CHIPS R&D) under the Department of Commerce's CHIPS for America Program is to accelerate the development and commercial deployment of

IP Security in Structured ASIC: Challenges and Prospects

September 25, 2024
Author(s)
Rasheed Almawzan, Sudipta Paria, Aritra Dasgupta, Kostas Amberiadis, Swarup Bhunia
With the globalization of hardware manufacturing and the growing demand for electronics, companies now heavily rely on offshore facilities for most of the design and manufacturing processes, including emerging technologies like Structured ASICs

Quadrature amplitude modulation for electronic side and Pound-Drever-Hall locking

September 13, 2024
Author(s)
Juntian Tu, Alessandro Restelli, Tsz-Chun Tsui, Kevin Weber, Ian Spielman, James(Trey) Porto, Steven Rolston, Sarthak Subhankar
The Pound-Drever-Hall (PDH) technique is routinely used to stabilize the frequency of a free-running laser to an ultralow expansion (ULE) reference cavity. The electronic sideband (ESB) locking scheme—a variant of the standard PDH locking scheme—helps

Low Energy Spiking Neural Network using Ge4Sb6Te7 Phase-Change Memory Synapses

August 6, 2024
Author(s)
Huairuo Zhang, Albert Davydov, Shafin Hamid, Eric Pop, Asir Khan
Spiking neural networks (SNN) with Ge2Sb2Te5 (GST) based phase change memory (PCM) synaptic devices are promising for edge applications. However, from a de-vice standpoint, the performance of such SNN is often con-strained by the abrupt depression

On-Wafer Capacitor Characterization Including Uncertainty Estimates Up to 1.0 THz

July 19, 2024
Author(s)
Robert Jones, Jerome Cheron, Benjamin Jamroz, Dylan Williams, Ari Feldman, Peter Aaen, Christian Long, Nathan Orloff
In this article we extract the capacitance of shunt and series metal-insulator-metal capacitors from on-wafer S-parameter measurements in the WR1.0 waveguide band. We verify consistency of the measured devices in two different state-of-the-art terahertz

A 0.1 GHz to 1.1 THz Inverted Grounded-CPW mTRL Calibration Kit Characterization in an InP HBT Process

May 13, 2024
Author(s)
Jerome Cheron, Rob Jones, Dylan Williams, Miguel Urteaga, Bryan Bosworth, Nick Jungwirth, Jeffrey Jargon, Ben Jamroz, Chris Long, Nate Orloff, Ari Feldman, Peter Aaen
We report a novel design approach of on-wafer multiline thru-reflect-line (mTRL) calibration kit fabricated on a commercial semiconductor-based transistor process that we validate from 0.1 GHz to 1.1 THz. The on-wafer calibration standards are designed

Optical frequency division & pulse synchronization using a photonic-crystal microcomb injected chip-scale mode-locked laser

February 15, 2024
Author(s)
Chinmay Shirpurkar, Jizhao Zang, Ricardo Bustos-Ramirez, David Carlson, Travis Briles, Lawrence R. Trask, Srinivas V. Pericherla, Di Huang, Ashish Bhardwaj, Gloria E. Hoefler, Scott Papp, Peter J. Delfyett
A mode-locked laser photonic integrated circuit with a repetition rate of 10 GHz is optically synchronized to a tantalabased photonic crystal resonator comb with a repetition rate of 200 GHz. The synchronization is achieved through regenerative harmonic

Heart-on-a-Chip Systems: Disease Modeling and Drug Screening Applications

February 14, 2024
Author(s)
Derrick Butler, Darwin Reyes-Hernandez
Cardiovascular disease (CVD) is the leading cause of death worldwide, casting a substantial economic footprint and burdening the global healthcare system. Historically, pre-clinical CVD modeling and therapeutic screening has been performed using animal

Advancing Measurement Science for Microelectronics: CHIPS R&D Metrology Program

February 13, 2024
Author(s)
Marla L. Dowell, Hannah Brown, Gretchen Greene, Paul D. Hale, Brian Hoskins, Sarah Hughes, Bob R. Keller, R Joseph Kline, June W. Lau, Jeff Shainline
The CHIPS and Science Act of 2022 called for NIST to "carry out a microelectronics research program to enable advances and breakthroughs....that will accelerate the underlying R&D for metrology of next-generation microelectronics and ensure the

Josephson Sampler Response using a Binary Search Algorithm

January 19, 2024
Author(s)
BART VAN ZEGHBROECK, Logan Howe, Pete Hopkins
This paper presents the use of a binary search algorithm to obtain the simulated response of a superconducting Josephson junction-based sampler. In the absence of noise, this simple approach is superior to mimicking the experimental approach of using an

SHINERS Study of Chloride Order-Disorder Phase Transition and Solvation of Cu(100)

January 3, 2024
Author(s)
Thomas P. Moffat, David Raciti, Angela R. Hight Walker, Eric J. Cockayne, John Vinson, Kathleen Schwarz
Shell-isolated Nanoparticle Enhance Raman Spectroscopy (SHINERS) and Density Functional Theory (DFT) are used to probe Cl- adsorption and the order-disorder phase transition associated with the c(2×2) Cl- adlayer on Cu(100) in acid media. A two-component 
Displaying 26 - 50 of 699
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