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NIST Authors in Bold

Displaying 651 - 675 of 1415

Resistivity Dominated by Surface Scattering in Sub-50 nm Cu Wires

January 25, 2010
Author(s)
Rebekah L. Graham, Glenn Alers, Thomas Mountsier, N. Shamma, S. Dhuey, R. H. Cabrini, Roy H. Geiss, David T. Read, S. Peddeti
The electron scattering mechanisms in sub-50nm copper lines were investigated to understand the extendibility of copper interconnects when the line width or thickness is less than the mean free path. Electron-beam lithography and a dual hardmask approach

Molecular transistors scrutinized

December 23, 2009
Author(s)
James G. Kushmerick
Transistors have been made from single molecules, where the flow of electrons is controlled by modulating the energy of the molecular orbitals. Insight from such systems could aid the development of future electronic devices.

Nanoelectronic Fabrication with Flip Chip Lamination

December 15, 2009
Author(s)
Mariona Coll Bau, Curt A. Richter, Christina Hacker
Nanoelectronic fabrication with Flip chip lamination Mariona Coll, CA Richter, CA Hacker, Colloquium Catalan Institute of Nanoscience and Nanotechnology CIN2, Barcelona Spain, Dec 2009.

Chemical Science and Technology Laboratory (CSTL) 2009 Annual Report

November 17, 2009
Author(s)
Willie E. May, Richard R. Cavanagh, Dianne L. Poster, Michael D. Amos
CSTL is entrusted with building, sustaining, and maximizing the chemical measurement system that is criticial to chemical technological innovation, economic competitiveness and new job growth for the benefit of the Nation.

Fabrication with Flip-Chip Lamination

November 15, 2009
Author(s)
Mariona Coll Bau, Curt A. Richter, Christina Hacker
Fabrication with Flip-Chip Lamination , Mariona Coll, DR Hines, CA Richter, CA Hacker, Nanotechnology colloquium, Wake Forest University, 11-09.

Fabrication with Flip-Chip Lamination

October 15, 2009
Author(s)
Mariona Coll Bau, Curt A. Richter, Christina Hacker
Fabrication with Flip-Chip Lamination , Mariona Coll, DR Hines, CA Richter, CA Hacker, MRSEC surface physics colloquium, University of Maryland, College Park, 10-09.

Adhesion, Copper Voiding, and Debonding Kinetics of Copper/Dielectric Diffusion Barrier Films

October 13, 2009
Author(s)
Ryan P. Birringer, Roey Shaviv, Thomas Mountsier, Jon Reid, Jian Zhou, Roy H. Geiss, David T. Read, Reinhold Dauskardt
Effects of the chemistry of electroplated copper films on stress-induced voiding and adhesion between the films and a SiN barrier layer are reported. The void density as observed by scanning electron microscopy decreased markedly with increasing Cu purity

High-Voltage Capacitance Measurement System for SiC Power MOSFETs

September 24, 2009
Author(s)
Parrish Ralston, Tam H. Duong, Nanying Yang, David W. Berning, Colleen E. Hood, Allen R. Hefner Jr., Kathleen Meehan
Adequate modeling of a power MOSFET is dependent on accurate characterization of the inter-electrode capacitances. With the advent of high voltage silicon carbide (SiC) power MOSFETs, it has become important to develop a measurement system that can perform

Outdoor-to-Indoor Channel Measurements and Models

September 1, 2009
Author(s)
Catherine A. Remley, Christopher L. Holloway, David W. Matolak
This document reports on wireless channel measurements and models for outdoor to indoor propagation environments. Although there have been a number of publications that have recently appeared on this topic, e.g., [1], [2], and references therein, the

Nanoscale Measurements with a Through-Focus Scanning-Optical-Microscope

July 15, 2009
Author(s)
Ravikiran Attota, Richard M. Silver, Thomas A. Germer
We present a novel optical technique that produces nanometer dimensional measurement sensitivity using a conventional optical microscope, by analyzing through-focus scanning-optical-microscope (TSOM) images obtained at different focus positions. In

Flexible Solution-Processed Memristors

June 3, 2009
Author(s)
Nadine E. Gergel-Hackett, Behrang H. Hamadani, B Dunlap, John S. Suehle, Curt A. Richter, Christina A. Hacker, David J. Gundlach
We have fabricated physically flexible nonvolatile memory devices using inexpensive, room-temperature, solution processing. The behavior of these devices is consistent with that of a memristor device, the missing fourth circuit element theoretically

Uncertainty Analysis for Noise-Parameter Measurements at NIST

April 9, 2009
Author(s)
James P. Randa
The uncertainty analysis is presented for NIST measurements of noise parameters of amplifiers and transistors, in both connectorized (coaxial) and on-wafer environments. We treat both the X-parameters, which are based on the wave representation of the
Displaying 651 - 675 of 1415
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