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Impact of near interface defects on NO annealed SiC MOSFET mobility

Published

Author(s)

Yu Xin Wen, Bing-Yue Tsui, Kin Cheung

Abstract

A series of recent studies asserted that near-interface-traps (NITs) are introduced by the post-oxidation NO annealing process and these NITs are the cause for the low mobility of NO annealed SiC MOSFETs. We use fast Id-Vg measurement to directly probe these NITs at speed up to 10 ns and to check if these assertions are true. The fast id-Vg measurement has a simple interpretation and conclusively refuted these assertions.
Citation
Microelectronics Reliability
Volume
173

Keywords

SiC, MOSFET, mobility, near interface trap, interface trap, fast Id-Vg

Citation

Wen, Y. , Tsui, B. and Cheung, K. (2025), Impact of near interface defects on NO annealed SiC MOSFET mobility, Microelectronics Reliability, [online], https://doi.org/10.1016/j.microrel.2025.115841, https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=959480 (Accessed July 19, 2025)

Issues

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Created July 2, 2025, Updated July 15, 2025
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