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Experimental Measurement of the Effect of Copper Through-Silicon Via Diameter on Stress Buildup Using Synchrotron-based X-ray Source

Published

Author(s)

Chukwudi A. Okoro, Lyle E. Levine, Yaw S. Obeng, Ruqing Xu

Abstract

In this work, the effect of Cu through-silicon via (TSV) diameter on stress buildup in Cu TSVs was experimentally determined using synchrotron-based X-ray microdiffraction technique. With the aid of atomic force microscopy (AFM), Cu protrusion was also quantified. A single chip with different Cu TSV diameters (3 µm, 5 µm and 8 µm), all having same depth and processing conditions was used in this study. No clear relationship between stress and Cu TSV diameter was measured; the mean hydrostatic stresses were 190 ±25 MPa (3 µm diameter), 138 ± 19 MPa (5 µm diameter) and 209 ± 26 MPa (8 µm diameter). This lack of obvious relationship between stress and Cu TSV diameter contradicts many reported finite element analysis (FEA) studies. From the AFM Cu protrusion measurements, the cause of this discrepancy was identified, and it is related to the neglect of the polycrystalline nature of the microstructure of Cu TSVs, as well as Cu deformation and stress relaxation mechanisms in the FEA simulations. Inelastic deformation, grain boundary sliding (GBS), rate-controlled dislocation motion and void/crack formation contribute to the stress state of the Cu TSVs. As such, their neglect in FEA simulation studies leads to inaccurate predictions of stresses in Cu TSVs.
Citation
Journal of Materials Science
Volume
50
Issue
18

Keywords

through-silicon via (TSV), Stress, Synchrotron X-ray, 3D-Integrated circuits (3D-IC)

Citation

Okoro, C. , Levine, L. , Obeng, Y. and Xu, R. (2015), Experimental Measurement of the Effect of Copper Through-Silicon Via Diameter on Stress Buildup Using Synchrotron-based X-ray Source, Journal of Materials Science, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=917647 (Accessed April 15, 2024)
Created June 20, 2015, Updated February 19, 2017