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Electromagnetic Field Test Structure Chip for Back End of the Line Metrology

Published

Author(s)

Lin You, Jungjoon Ahn, Emily Hitz, Jonathon Michelson, Yaw S. Obeng, Joseph J. Kopanski

Abstract

A test chip to produce known and controllable gradients of surface potential and magnetic field at the chip surface and suitable for imaging with various types of scanning probe microscopes is presented. The purpose of the test chip is to evaluate various SPMs as metrology tools to image electro-magnetic fields within nanoelectronic devices and multi-level interconnects, and as metrology tools to detect defects in back end of line (BEOL) metallization and packaging processes. Four different levels of metal are used to create different buried structures that, when biased, will produce varying electric field and magnetic field distributions. Contacts to the chip are made via wire bonds to a printed circuit board (PCB) that allows programed external biases and ground to be applied to specific metal levels while imaging with a SPM. DC and high frequency COMSOL simulations of the test structures were conducted to determine the expected field distributions. Electric field can be imaged via scanning Kelvin force microscopy (SKFM); magnetic field via scanning magnetic force microscopy (MFM); and the capacitance of buried metal lines via scanning microwave microscopy (SMM). The combination of precisely known structures and accurate simulations will allow the spatial resolution and accuracy of various SPMs sensitive to electric field (potential) or magnetic field to be determined and improved.
Proceedings Title
Proceedings of the 28th IEEE International Conference on Microelectronic Test Structures
Conference Dates
March 23-26, 2015
Conference Location
Phoenix, AZ
Conference Title
28th IEEE International Conference on Microelectronic Test Structures

Keywords

BEOL, electromagnetic field measurements, three-dimensional integrated circuits, SKFM, SMM

Citation

You, L. , Ahn, J. , Hitz, E. , Michelson, J. , Obeng, Y. and Kopanski, J. (2015), Electromagnetic Field Test Structure Chip for Back End of the Line Metrology, Proceedings of the 28th IEEE International Conference on Microelectronic Test Structures, Phoenix, AZ, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=918005 (Accessed April 23, 2024)
Created March 23, 2015, Updated February 19, 2017