We are developing the instrumentation and prototype samples at NIST to enable the counting of atom-spacings across linewidth features etched in silicon. This is an effort to allow the accurate counting of atom-spacings across a feature in a controlled environment and to subsequently transfer that dimensionally stabilized artifact to other measuring instruments. In this paper we will describe the sample preparation techniques, sample configurations and imaging instrumentation used in this project. We have constructed a multi-chamber ultra-high vacuum (UHV) system with silicon processing capabilities which include the high temperature removal of native oxides and the appropriate temperature control and vacuum environment for preparing long range atomically ordered silicon surfaces. We can also passivate the silicon surfaces by oxidation in a temperature and pressure controlled environment or simply allow a native oxide to grow in air ambient. This facility has a scanning tunneling microscope (STM) with atomic lateral imaging capabilities and a 0.2 angstrom vertical noise floor. The loadlock chamber allows rapid transfer of multiple tips and samples into the UHV environment. The facility is additionally equipped with a field-ion / field-electron microscope (FIFEM) which can atomically image, measure, and prepare the STM tips. The FIFEM enables the use of STM tips of known dimensions and cleanliness on a regular basis.
Proceedings Title: Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography XII, Bhanwar Singh, Editor
Conference Dates: February 23, 1998
Conference Location: Santa Clara, CA
Conference Title: Linewidth Calibration Metrology
Pub Type: Conferences