We designed and fabricated a test chip to help us evaluate the performance of new approaches to measurement of small capacitances (femto-Farads to atto-Farads range). The test chip consists of an array of metal-oxide-semiconductor capacitors, metal-insulator-metal capacitors, and series of systematically varying capacitance structures directly accessible by an atomic force microscope probe. Nominal capacitances of the test devices range from 0.3 fF (10^-15 F) to 1.2 pF (10^-12 F). Measurement of the complete array of capacitances using an automatic probe station produces a 'fingerprint' of capacitance values from which, after correcting for pad and other stray capacitances, the relative accuracy and sensitivity of a capacitance measurement instrument or circuit can be evaluated.
Proceedings Title: Proc., IEEE International Conference on Microelectronic Test Structures
Conference Dates: March 30-April 2, 2009
Conference Location: Oxnard, CA
Conference Title: 22nd IEEE International Conference on Microelectronic Test Structures
Pub Type: Conferences
capacitance measurement, test chip