High-Frequency Electronics

This project addresses the hardware and calibration challenges of mm-Wave and THz device measurements in the new communication bands beyond 5G architectures and other emerging applications above 100 GHz. We develop new calibration and measurement approaches to support the entire development cycle for high-frequency architectures, including transistor measurement, modeling and design techniques, model verification, on-wafer circuit test at both component and system-performance levels, quantitative OTA system-level test and the development of novel high-precision instruments and sources above 100 GHz.

This project addresses research gaps in the 7 technical areas:

1. Develop advanced on-wafer calibration standards in semiconductor foundry process and new calibration procedures
2. Develop characterization techniques for millimeter-wave/ sub-THz transistors and microelectronic circuits
3. Develop reliable transistor models that include manufacturing variation for circuit simulators
4. Fabrication and realization of integrated active circuits with nominal expected designed RF performance (i.e. 1st pass design success)
5. Investigate new approaches to on-wafer RF reference sources using electronics and phototransistors to develop advanced instrumentation
6. Metrology for on-wafer to over-the-air measurements and characterizations
7. Applying machine learning techniques to improve the state-of-the-art advanced calibration and circuit design

This project currently supports semiconductor foundries through Cooperative Research and Development Agreements (CRADAs) and government programs (DARPA ELGAR and CHIPS metrology program). Our university collaborations are established through Measurement Science and Engineering (MSE) research grants and the Professional Research Experience Program (PREP).

Activities

Development of advanced on-wafer calibration standards in semiconductor processes. The goal is to develop new on-wafer calibration structures and advanced calibration procedures up to THz frequencies, with the objective to reduce measurement errors. We first design custom shielded calibration standards directly in semiconductor foundry processes to suppress substrate modes and investigate new calibration procedures to mitigate and account for undesired propagation paths such as probe-to-probe coupling. The best practices in the design of on-wafer standards and calibration procedures are reported in [1], with validation up to 1.1 THz. The on-chip calibration techniques can be applied to monolithic, hybrid, and 3D heterogeneously integrated circuits.
 

Advanced measurement techniques for high-frequency microelectronic applications. Adopting advanced calibration procedures, we develop unique large signal load-pull characterization in the millimeter-wave and sub-THz frequency ranges to accurately measure transistor and circuit RF performance. In 2026, we successfully validated new large-signal measurement setups with reduced measurement errors at 220 GHz. We measured and reported state-of-the-art load-pull performance [see list of publications] of InP, GaN, SiGe transistors from various US semiconductor foundries. We are working to develop higher-power and noise measurement capabilities above 100 GHz, as well as non-linear characterization with absolute phase calibrations.

High-frequency compact transistor models. The work of this project in developing more accurate transistor models is essential to the design of high-frequency circuits at low cost with expected performance. Transistor models, used in circuit simulators to design various integrated circuits, fail to accurately predict the actual performance of the transistor at millimeter wave frequencies and beyond. Several circuit fabrication cycles are consequently required to achieve expected RF performance. To accelerate innovation and reduce fabrication cost, we develop more reliable transistor compact models using advanced calibration and measurement techniques developed under this project. A key goal consists of integrating transistor manufacturing variation in transistor compact models to predict yield prior fabrication.

Integrated-circuit designs in semiconductor processes. We design innovative integrated structures and circuits up to 1 THz to support metrology across various NIST projects. We thoroughly take advantage of semiconductor processes that offer innovative design solutions for on-chip standards, transistor test structures, high power amplifiers for instrumentation, on-wafer sources based on oscillators and phototransistors, multipliers, mixers, and pulse generators that are designed and fabricated in US semiconductor foundry processes. Additionally, including process variation in the circuit design and optimization process will allow the determination of optimal design parameters under this variation, allowing users to assess the efficacy of a realized design, and facilitate improved designs and increased yields. This requires advanced optimization algorithms that are being developed in collaboration with university partners.
 

Sub-THz frequency sources referenced to optical sources Sub-THz electronics require on-wafer chip-scale sources with low phase noise and high frequency resolution. These high-fidelity sources can be achieved by driving photo mixers, photo diodes, and photo-sensitive transistors with optical beat notes generated from laser combs or dual-laser sources. Such opto-electronic sources already find practical applications up to THz frequencies. We develop new Sub-THz devices such as photo-mixers, phototransistors, and novel optically-injection locked oscillators, as well as compact models to efficiently connect optoelectronic devices to solid-state electronics in integrated THz systems.

Over-the-Air measurements and traceability: As the communications industry moves to more compact and embedded circuitry, connectorized RF test ports are often unavailable. Nevertheless, industry demands testing methodologies which must now be performed over-the-air. This project supports these efforts by extending our calibration expertise to produce traceable over-the-air measurements. This work enables the accurate characterization of next generation wireless communications systems.

Electronics for G-band Arrays (DARPA): We are applying our measurement, calibration and characterization expertise to help evaluate the performance of next generation G-band (170 to 260 GHz) circuits designed for communication. This includes transistors and power amplifiers in bleeding-edge III-V technologies. As part of our partnership with commercial foundries, we provide guidance on calibration methodologies and design techniques and characterize performers’ devices and circuits. Additionally, we are an independent evaluator of fabricated circuits for this program. Through this work we are directly improving industry’s understanding of their own fabrication technology.

CHIPS metrology program: Metrology for High Frequency transistor models Advanced semiconductor technology has led to continuous performance improvements in transistors. However, many iterations are needed to obtain optimal performance, and the yield and reproducibility is incredibly poor. Furthermore, US chip manufacturers are ill-equipped with legacy measurement techniques and underperforming models. We propose a robust path to develop and verify high-frequency transistor models: 1) new on-wafer standards and calibration, 2) precision noise measurements for transistor quality assurance, 3) improved characterizations, 4) optimal models tailored to a given technology, and 5) transistor model verification across frequency with key performance indicators.

Current Measurement Capabilities

• On-wafer and waveguide Scattering parameters to 1.1 THz
• Large signal load-pull capability from 110 GHz to 170 GHz: high-power (20-30 dBm)
• Large signal load-pull capability from 170 GHz to 260 GHz: high-power (10-15 dBm)
• Multi-harmonic load-pull to 40 GHz
• Pulse IV system
• Electro-optic sampling