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A Physics-Based Simple Series Resistance Extraction Methodology
Published
Author(s)
Kin P. Cheung, Jason P. Campbell
Abstract
Series resistance has become a serious obstacle encountered in the development of advanced CMOS devices. At the same time, series resistance quantification in these same advanced CMOS devices is a difficult challenge. In this study, we demonstrate a very simple series resistance extraction procedure which is derived from the ratio of two linear ID-VG measurements on a single device. The physics of this method is intuitively simple and the assumptions readily justifiable. The validity of this technique has been verified by a self-consistent methodology as well as the reproduction of a known external series resistance.
Proceedings Title
The 11th International Workshop on Junction Technology
Cheung, K.
and Campbell, J.
(2011),
A Physics-Based Simple Series Resistance Extraction Methodology, The 11th International Workshop on Junction Technology , Kyoto, -1, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=908460
(Accessed October 3, 2025)