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Limitations of Conductance to the Measurement of the Interface State Density of MOS Capacitors with Tunneling Gate Dielectrics

Published

Author(s)

Eric M. Vogel, W. K. Henson, Curt A. Richter, John S. Suehle

Abstract

A systematic study of the uncertainties, sensitivity and limitations of the conductance technique for extracting the interface state density of tunneling dielectrics is presented. The methodology required to extract device parameters and interface state density from conductance and capacitance data is reviewed and analyzed. The effect of uncertainties in device parameters on extracted interface state density was determined using experimental results of thin oxides (1.4 nm and 2.0 nm). Modeling was used to indicate the effects of various device parameters on the sensitivity of conductance to changes in interface state density. The effect of uncertainties in insulator capacitance of equivalently thin dielectric on uncertainties in extracted interface state density is minimal. The effect of uncertainties in series resistance increases bias towards accumulation. An increase in the series resistance of the device causes reduced sensitivity to changes in interface state density especially for interface states located nearer the majority band edge. Increasing tunnelling current causes increased uncertainties and reduced sensitivity to changes in interface state density especially for interface states nearer midgap.
Citation
IEEE Transactions on Electron Devices
Volume
47
Issue
3

Keywords

capacitor, conductance, dielectric, interface, SiO<sub>2</sub>, tunneling

Citation

Vogel, E. , Henson, W. , Richter, C. and Suehle, J. (2000), Limitations of Conductance to the Measurement of the Interface State Density of MOS Capacitors with Tunneling Gate Dielectrics, IEEE Transactions on Electron Devices (Accessed April 17, 2024)
Created February 29, 2000, Updated October 12, 2021