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Issues with Electrical Characterization of Advanced Gate Dielectrics in Metal-oxide-semiconductor devices

Published

Author(s)

Eric M. Vogel

Abstract

Experimental measurements and simulations are used to provide an overview of key issues with the electrical characterization of metal-oxide-semiconductor (MOS) devices with ultra-thin oxide and alternate gate dielectrics. Experimental issues associated with the most common electrical characterization method, capacitance-voltage (C-V) are first described. Issues associated with equivalent oxide thickness extraction and comparison, interface state measurement, and defect generation are then overviewed.
Proceedings Title
Proc., Workshop on Dielectrics in Microelectronics
Conference Dates
November 18-20, 2002
Conference Location
Grenoble, FR
Conference Title
2002 Workshop on Dielectrics in Microelectronics

Keywords

capacitance-voltage, gate dielectric, metal-oxide-semiconductor (MOS), reliability, electrical characterization

Citation

Vogel, E. (2002), Issues with Electrical Characterization of Advanced Gate Dielectrics in Metal-oxide-semiconductor devices, Proc., Workshop on Dielectrics in Microelectronics, Grenoble, FR (Accessed April 19, 2024)
Created November 30, 2002, Updated February 17, 2017