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Influence of Interface Traps and Surface Mobility Degradation on Scanning Capacitance Microscopy Measurement

Published

Author(s)

Y. D. Hong, Tong Y. Yeow, W. K. Chim, K. M. Wong, Joseph Kopanski

Abstract

Scanning Capacitance Microscopy (SCM) is based on metal-oxide-semiconductor (MOS) theory. However, instead of the standard 100 kHz to 1 MHz signal used in conventional MOS capacitance-voltage measurement, SCM uses signal at 915 MHz. At this high frequency, the reactance of the probe tip-to-substrate capacitance can become smaller than the series resistance of the substrate inversion layer, particularly when the surface mobility is degraded. In this paper we present simulation results of the SCM measurement to demonstrate the effect of surface mobility degradation. Comparison with actual SCM measurement data is made and implications on SCM measurement for accurate dopant profile extraction are also presented.
Citation
IEEE Transactions on Electron Devices
Volume
51
Issue
9

Keywords

Scanning capacitance microscopy, dopant profile extraction, semiconductor device modeling, simulation

Citation

Hong, Y. , Yeow, T. , Chim, W. , Wong, K. and Kopanski, J. (2004), Influence of Interface Traps and Surface Mobility Degradation on Scanning Capacitance Microscopy Measurement, IEEE Transactions on Electron Devices (Accessed December 5, 2024)

Issues

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Created August 31, 2004, Updated October 12, 2021