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Contact-Pad Design for High-Frequency Silicon Measurements

Published

Author(s)

Dylan Williams, A. C. Byers, V. C. Tyree, Dave K. Walker, J. J. Ou, X. Jin, M. Piket-Moy, C. Hu

Abstract

We measure and compare the electrical parasitics of contact pads of different designs fabricated on silicon integrated circuits and develop a strategy for reducing the parasitics.
Proceedings Title
Dig., 9th Elect. Perf. Elect. Pkg. Conf.
Conference Dates
October 23-25, 2000
Conference Location
Scottsdale, AZ, USA

Keywords

characteristic impedance, contact pads, measurement, silicon, substrate effect

Citation

Williams, D. , Byers, A. , Tyree, V. , Walker, D. , Ou, J. , Jin, X. , Piket-Moy, M. and Hu, C. (2000), Contact-Pad Design for High-Frequency Silicon Measurements, Dig., 9th Elect. Perf. Elect. Pkg. Conf., Scottsdale, AZ, USA, [online], https://doi.org/10.1109/EPEP.2000.895510, https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=28265 (Accessed April 18, 2024)
Created September 30, 2000, Updated October 12, 2021