Skip to main content
U.S. flag

An official website of the United States government

Official websites use .gov
A .gov website belongs to an official government organization in the United States.

Secure .gov websites use HTTPS
A lock ( ) or https:// means you’ve safely connected to the .gov website. Share sensitive information only on official, secure websites.

Circuit-Aware Device Reliability Criteria Methodology



Jason T. Ryan, Lan Wei, Jason P. Campbell, Richard G. Southwick, Kin P. Cheung, Anthony Oates, John S. Suehle, Phillip Wong


Meeting reliability requirements is an increasingly more difficult challenge with each generation of CMOS technology. The disconnection between conventional one-size-fits-all reliability specifications and the wide range of circuit applications might be a huge waste of resources. By taking into consideration circuit-level figures of merit, a novel methodology to establish device reliability criteria that reflects real-world operation of devices in circuits is proposed and demonstrated. This ―circuit-aware‖ methodology makes a real step toward realizing the goal of application-aware reliability standards which do not require additional measurements. The beauty is its simplicity – a simple transformation to solve an important problem. The simplicity makes it attractive as a standard methodology.
Proceedings Title
Proceedings of the European Solid State Device Research Conference
Conference Dates
September 12-16, 2011
Conference Location
Conference Title
European Solid State Device Research Conference


Reliability, Circuit Aware, Hot Carrier, Lifetime


Ryan, J. , Wei, L. , Campbell, J. , Southwick, R. , Cheung, K. , Oates, A. , Suehle, J. and Wong, P. (2011), Circuit-Aware Device Reliability Criteria Methodology, Proceedings of the European Solid State Device Research Conference, Helsinki, -1 (Accessed April 22, 2024)
Created September 12, 2011, Updated February 19, 2017