Characterization of Electrically Active Defects in High-K Gate Dielectrics By Using Low Frequency Noise, Charge Pumping, and Fast Id-Vg measurements

Published

September 30, 2007

Author(s)

Hao Xiong, Dawei Heh, Moshe Gurfinkel, Qiliang Li, Yoram Shapira, Curt A. Richter, Gennadi Bersuker, Choi Rino, John S. Suehle

Abstract

The electrically active defects in High-k/SiO2 dielectric stacks are examined using a combination of low frequency noise (LFN), charge pumping (CP), and ultra fast Id-Vg methods. The volume trap profile in the stacks is obtained by modeling the drain current noise spectra and charge pumping currents, with each technique covering different depth range. The LFN is dependent on both the High-k and IL thicknesses while the CP current is mainly dependent on the IL thickness. The current fluctuations and threshold voltage instabilities are also found to be closely correlated.

Citation

Materials Science and Engineering A-Structural Materials Properties Microstructure and Processing

Volume

84

Issue

9-10

Pub Type

Journals

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Keywords

border trap, charge pumping, depth profiling, low frequency noise

Citation

Xiong, H. , Heh, D. , Gurfinkel, M. , Li, Q. , Shapira, Y. , Richter, C. , Bersuker, G. , Rino, C. and Suehle, J. (2007), Characterization of Electrically Active Defects in High-K Gate Dielectrics By Using Low Frequency Noise, Charge Pumping, and Fast Id-Vg measurements, Materials Science and Engineering A-Structural Materials Properties Microstructure and Processing, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=32633 (Accessed April 18, 2024)