NOTICE: Due to a lapse in annual appropriations, most of this website is not being updated. Learn more.

Form submissions will still be accepted but will not receive responses at this time. Sections of this site for programs using non-appropriated funds (such as NVLAP) or those that are excepted from the shutdown (such as CHIPS and NVD) will continue to be updated.

U.S. flag

An official website of the United States government

Official websites use .gov
A .gov website belongs to an official government organization in the United States.

Secure .gov websites use HTTPS
A lock ( ) or https:// means you’ve safely connected to the .gov website. Share sensitive information only on official, secure websites.

PUBLICATIONS

Challenges in Metrology for the Semiconductor Industry

Published

Author(s)

Stephen Knight, Joaquin (. Martinez

Abstract

Leading edge Ultra Large Scale Integrated Circuit manufacture is now well into the realm of Nanoelectronics, with some critical dimensions below 40 nm. The pressures on metrology supporting this manufacture are escalating rapidly. In this presentation we will discuss present and future metrology needs and potential solutions.
Citation
Journal of Vacuum Science and Technology B
Pub Type
Journals

Download Paper

Local Download

Keywords

circuit, cirtical dimension, metrology, nanoelectronics, semiconductor

Citation

Knight, S. and Martinez, J. (2005), Challenges in Metrology for the Semiconductor Industry, Journal of Vacuum Science and Technology B, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=31889 (Accessed October 24, 2025)

Issues

If you have any questions about this publication or are having problems accessing it, please contact [email protected].

Created March 20, 2005, Updated October 12, 2021
Was this page helpful?