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Accelerated Stress Test Assessment of Through-Silicon Vias Using RF Signals

Published

Author(s)

Chukwudi A. Okoro, Pavel Kabos, Jan Obrzut, Klaus Hummler, Yaw S. Obeng

Abstract

In this work, radio frequency (RF) signal is demonstrated as an effective metrology tool for the assessment of the effect of thermal cycling on the reliability of through-silicon via (TSV) stacked dies. It was found that RF signal integrity of TSV daisy chain degraded with thermal cycling. Early failures were observed in the reliability analysis of the TSV daisy chain and were attributed to processing related variability across wafer. The maximum failure rate was found to occur at 500 cycles, caused by the initiation and the propagation of defects. Analysis performed using the traditional DC resistance (RDC) measurement technique showed that the increase resistance scaled with the number of thermal cycles. This suggests that change in the resistance of the TSV daisy chain is a significant electrical equivalent circuit parameter contributor to the observed increase in the transmission coefficient due to thermal cycling.
Citation
IEEE Transactions on Electron Devices
Volume
60
Issue
6

Citation

Okoro, C. , Kabos, P. , Obrzut, J. , Hummler, K. and Obeng, Y. (2013), Accelerated Stress Test Assessment of Through-Silicon Vias Using RF Signals, IEEE Transactions on Electron Devices, [online], https://doi.org/10.1109/TED.2013.2257791 (Accessed December 3, 2024)

Issues

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Created June 1, 2013, Updated November 10, 2018