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Mark D. Stiles (Fed)

Mark Stiles is a Project Leader and NIST Fellow in the Alternative Computing Group in the Nanoscale Device Characterization Division of the Physical Measurement Laboratory (PML). His research, published in over 165 papers, has focused on the development of a variety of theoretical methods for predicting the properties of magnetic nanostructures and has recently shifted to neuromorphic computing. He has helped organize numerous conferences and has served the American Physical Society on the Executive Committee of the Division of Condensed Matter Physics and as Chair and on the Executive Committee of the Topical Group on Magnetism. He has also served as a Divisional Associate Editor for Physical Review Letters, served on the Editorial Board of Physical Review Applied, and is an Associate Editor for Reviews of Modern physics. Mark is a Fellow of the American Physical Society and IEEE and has been awarded the Silver Medal from the Department of Commerce and the Samuel Wesley Stratton Award from NIST.

Projects

Selected Publications

Publications

Large Exotic Spin Torques in Antiferromagnetic Iron Rhodium

Author(s)
Jonathan Gibbons, Takaaki Dohi, Vivek Amin, Fei Xue, Haowen Ren, Hanu Arava, Hilal Saglam, Yuzi Liu, John Pearson, Nadya Mason, Amanda Petford-Long, Paul M. Haney, Soho Shim, Jun-wen Xu, Mark Stiles, Eric Fullerton, Andrew Kent, Shunsuke Fukami, Axel Hoffmann
Spin torque is a promising tool for driving magnetization dynamics for novel computing techniques. These torques can be easily produced by spin-orbit effects

Quantum materials for energy-efficient neuromorphic computing: Opportunities and challenges

Author(s)
Axel Hoffmann, Shriram Ramanathan, Julie Grollier, Andrew Kent, Marcelo Rozenberg, Ivan Schuller, Oleg Shpyrko, Robert Dynes, Yeshaiahu Fainman, Alex Frano, Eric Fullerton, Giulia Galli, Vitaliy Lomakin, Shyue Ping Ong, Amanda K. Petford-Long, Jonathan A. Schuller, Mark Stiles, Yayoi Takamura, Yimei Zhu
Neuromorphic computing approaches become increasingly important as we address future needs for efficiently processing massive amounts of data. The unique

Implementation of a Binary Neural Network on a Passive Array of Magnetic Tunnel Junctions

Author(s)
Jonathan Goodwill, Nitin Prasad, Brian Hoskins, Matthew Daniels, Advait Madhavan, Lei Wan, Tiffany Santos, Michael Tran, Jordan Katine, Patrick Braganca, Mark Stiles, Jabez J. McClelland
The increasing scale of neural networks and their growing application space have produced a demand for more energy and memory efficient artificial-intelligence

Patents

TIMING-BASED COMPUTER ARCHITECTURE SYSTEMS AND METHODS

NIST Inventors
Advait Madhavan , Mark D. Stiles and Matthew Daniels
patent description The invention is a circuit/computer architecture that supports the rapid, energy efficient evaluation of tropical algebra primitives. These operations that choose the minimum or maximum elements among those in an array; operations that add together two values; operations that
Created October 9, 2019, Updated September 7, 2022