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Darwin Reyes-Hernandez (Fed)
Dr. Reyes-Hernandez is a biomedical engineer in the Microsystems and Nanotechnology Division of the Physical Measurement Laboratory (PML) at the National Institute of Standards and Technology (NIST). He received a B.S. and Ph.D. in chemistry from the University of Puerto Rico, and an M.S. in Applied Biomedical Engineering from Johns Hopkins University. In his doctoral work, he combined the fields of environmental analytical chemistry and toxicology. In it, he chemically characterized airborne particulate matter from an area in Puerto Rico of high incidence of cancer, asthma, and other respiratory diseases, using cell-based toxicological assays. After completing his Ph.D. he was awarded with a National Science Foundation (NSF) Postdoctoral Fellowship to work with Professor Andreas Manz at Imperial College, London, U.K., where he worked for two years. During this postdoctoral experience, he worked with microfluidic devices in developing two-dimensional separation systems and analog computing using glow discharge in microfluidic chips.
Dr. Reyes-Hernandez was awarded in 2002 with a National Research Council/NIST postdoctoral fellowship to work at NIST, USA. He is currently working in the development of microfluidic systems with electronic manipulation and measurement for cell-based assays and drug screening; electronic flow measurement sensors/methods; cell-substrate biomimetic interfaces with tunable elasticity; additive manufacturing (3D Printing) using fused deposition modeling (FDM) for microfluidic devices; and thin, flexible wearable sensors.
During his time at NIST, Dr. Reyes-Hernandez has been part of various intramural funded projects including research funded by the Advanced Technology Program (ATP), Director's Reserve Funds, Innovations in Measurement Science Program (IMS) and more recently, the NIST on a Chip Initiative.
CURRENT RESEARCH PROJECTS
- Bioelectronic Sensors for Tissue/Organ-on-a-Chip Systems
- Electroacoustic Wave-Based Flow Sensors
- Organ-on-a-Chip/Tissue-on-a-Chip Engineering and Efficacy Standardization Working Group