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Young's Modulus Measurements in Standard IC CMOS Processes using MEMS Test Structures

Published

Author(s)

Janet M. Cassard, David L. Herman, Paul T. Vernier, Don DeVoe, Michael Gaitan

Abstract

This letter presents a method to measure the Young?s moduli of the individual thin film layers in a commercial integrated circuit (IC) foundry process. The method is based on measuring the resonance frequency of an array of micromachined cantilevers and using the presented optimization analysis to determine the elastic modulus of each layer. Arrays of cantilever test structures were fabricated in a commercial CMOS IC process and released using XeF2 as a post-processing etch. A piezoelectric transducer placed under the test chip was used to excite the cantilevers to resonance and the resonance frequency was measured using a laser Doppler vibrometer. It is reported that excellent agreement for values of Young?s modulus is observed for cantilevers between 200 um and 400 um in length with the average standard deviation being 4.07 GPa.
Citation
IEEE Electron Device Letters
Volume
28
Issue
11

Keywords

CMOS, MEMS, residual stress, resonance, test structures, thickness measurements, Young''''''''s modulus

Citation

Cassard, J. , Herman, D. , Vernier, P. , DeVoe, D. and Gaitan, M. (2007), Young's Modulus Measurements in Standard IC CMOS Processes using MEMS Test Structures, IEEE Electron Device Letters, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=32659 (Accessed June 22, 2024)

Issues

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Created October 31, 2007, Updated October 12, 2021