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VCI Simulation with Semiconductor Device Models: Test Report



John S. Villarrubia


JMONSEL, an electron beam imaging simulator, has been modified to permit conducting regions of a sample to be designated as unconnected to an external source or sink of charge (floating) or, alternatively, to be connected with a user-specified relaxation time. The relaxation time may be constant or voltage-dependent in order to mimic realistic devices. These modifications were motivated by the need to simulate imaging of defective contacts. Such contacts may be experimentally detected by voltage contrast imaging (VCI). To simulate VCI, the potentials of such contacts must be determined, which in turn requires simulating their connection properties in addition to the other properties (scattering, electron emission, charging, electric fields) that are already part of JMONSEL. To test the modifications, a test structure suggested by Intel was used. The structure had three 32 nm diameter metal-filled contacts centered 64 nm apart. In different simulations, the contacts were grounded, allowed to float, or connected to ground with different characteristic relaxation times. Results indicate that the scanned part of the sample builds up a net positive charge that causes most of the sample surface in the neighborhood of the contacts to reside near the bottom of a potential energy well. Electrons with enough energy escape the well and contribute to the measured signal, while other electrons do not. Electrons that are generated in surface regions of high potential are less likely to escape than those generated in regions of low potential. However, voltage contrast does not always produce image contrast. Bad (floating) contacts were distinguishable from good (grounded) ones, but moderately bad contacts (relaxation time equal to the time to acquire one or two frames of the image) were indistinguishable from good ones under the conditions simulated. Recommendations are made concerning how the measurement conditions might be altered to render such contacts disti
Intel internal report


scanning electron microscopy, Monte Carlo simulation, lithography metrology, defect metrology


Villarrubia, J. (2012), VCI Simulation with Semiconductor Device Models: Test Report, Intel internal report (Accessed July 12, 2024)


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Created February 29, 2012, Updated February 19, 2017