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Test Structures for Referencing Electrical Linewidth Measurements to Silicon Lattice Parameters Using HRTEM



Richard A. Allen, B A. am Ende, Michael W. Cresswell, Christine E. Murabito, T J. Headley, William F. Guthrie, Loren W. Linholm, Colleen E. Hood, E. Hal Bogardus


A technique has been developed to determine the linewidths of the features of a prototype reference material for the calibration of CD (Critical-Dimension) metrology instruments. The reference features are fabricated in mono-crystalline-silicon with the sidewalls aligned to the (111) lattice planes. A two-step measurement procedure is used to determine the CDs. The primary measurement is via lattic-plane counting of selected samples using High-Resolution Transmission Electron Microscopy (HRTEM); the transfer calibration is via Electrical CD (ECD) test-structure metrology. Samples of these prototype reference materials were measured and provided, as NIST Reference Material RM8110, to International SEMATECH for evaluation by its member companies. In this paper, we will describe the measurement procedure and show how the combined uncertainty of less than 15 nm was derived. Additionally, we demonstrate a technique to automate the analysis of the phase-contrast images in order to both minimize the cost and reduce the uncertainty of the calibration of the standards.
IEEE Transactions on Semiconductor Manufacturing


linewidth, metrology, semiconductor process control, standard, test structure, VLSI, critical dimension
Created May 1, 2003, Updated February 17, 2017