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Submicron Imaging of Buried Integrated Circuit Structures Using Scanning Confocal Electron Microscopy

Published

Author(s)

S P. Frigo, Zachary H. Levine, N J. Zaluzec

Abstract

We collected two-dimensional images of model integrated circuit components using scanning confocal electron microscopy. The structures were embedded in 0.01 mm of silicon oxide dielectric. Lateral resolutions as low as 20 nm are achievable. A parallax analysis of images taken for various tilt angles to the electron beam allows the determination of interlayer spacing. The results show that scanning confocal electron microscopy is capable of probing buried structures at resolutions that will be necessary for the inspection of next-generation integrated circuit technology.
Citation
Applied Physics Letters
Volume
81
Issue
No. 11

Keywords

integrated circuit interconnect, scanning transmission electron microscop

Citation

Frigo, S. , Levine, Z. and Zaluzec, N. (2002), Submicron Imaging of Buried Integrated Circuit Structures Using Scanning Confocal Electron Microscopy, Applied Physics Letters (Accessed June 16, 2024)

Issues

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Created August 31, 2002, Updated October 12, 2021