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Scanning Capacitance Microscopy for Measuring Device Carrier Profiles beyond the 100 nm Generation

Published

Author(s)

Joseph Kopanski, Jay F. Marchiando, Brian G. Rennex

Abstract

The Scanning Capacitance Microscope (SCM) is a leading candidate for a metrology capable of measuring the two-dimensional (2-D) carrier profiles of cross-section silicon transistors. The International Technology Roadmap for Semiconductors (ITRS) identifies 2-D carrier profiling as a critical metrology to aid in the development of future generations of ICs. If accurate 2-D carrier profiles could be measured, they could be used to verify the 2-D models of the physical processes used to produce the source/drain junctions of transistors. Such measurements could be used to calibrate and ultimately enhance the predictive capabilities of technology computer aided design (TCAD). For this application, the performance goals for 2-D carrier profiling tools are very challenging. Carrier profiles of the source and drain regions of the transistors need to be known with 5 nm spatial resolution and 1 5% accuracy in 2000 - the requirements rise to 0.6 nm spatial resolution and 1 2% accuracy by 2014. Since 1992, there has been a program at the National Institute of Standards and Technology in the United States to develop the measurement techniques and theoretical modeling necessary to make SCM a practical metrology for quantitative measurement of 2-D carrier profiles. The SCM carrier profiling technique will be described in detail from sample preparation, to SCM image measurement and to extraction of the final 2-D carrier profile.
Proceedings Title
Tech. Dig., 2000 International Microprocesses and Nanotechnology Conference
Conference Dates
July 11-13, 2000
Conference Location
Tokyo, 1, JA

Keywords

scanning capacitance microscopy, SCM, dopant profiling, carrier profiling

Citation

Kopanski, J. , Marchiando, J. and Rennex, B. (2000), Scanning Capacitance Microscopy for Measuring Device Carrier Profiles beyond the 100 nm Generation, Tech. Dig., 2000 International Microprocesses and Nanotechnology Conference, Tokyo, 1, JA (Accessed May 26, 2024)

Issues

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Created December 30, 2000, Updated October 12, 2021