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RM 8111: Development of a Prototype Linewidth Standard

Published

Author(s)

Michael W. Cresswell, William Gutherie, R. Dixon, Richard A. Allen, Christine E. Murabito, Joaquin (. Martinez

Abstract

Staff of the Semiconductor Electronics Division, the Information Technology Laboratory, and the Precision Engineering Laboratory at NIST, in collaboration with VLSI Standards, Inc., of San Jose, California, have developed a new generation of prototype Single-Crystal CD Reference Materials for calibrating CD-metrology instruments that are used in semiconductor manufacturing. The reference material is configured as a 9-mm x 11-mm silicon test-structure chip that is mounted in a 200-mm silicon carrier wafer. The fabrication of both the chip itself and the carrier wafer use the type of lattice-plane-selective etching that is commonly employed in MEMS fabrication. The certified CDs of the reference features are determined from AFM-CD measurements that are referenced to high-resolution transmission-electron microscopy images that reveal the cross-section counts of lattice planes having a pitch that is traceable to the SI meter.
Citation
Journal of Research (NIST JRES) -
Volume
111
Issue
3

Citation

Cresswell, M. , Gutherie, W. , Dixon, R. , Allen, R. , Murabito, C. and Martinez, J. (2006), RM 8111: Development of a Prototype Linewidth Standard, Journal of Research (NIST JRES), National Institute of Standards and Technology, Gaithersburg, MD (Accessed May 20, 2024)

Issues

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Created April 30, 2006, Updated October 12, 2021