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Optimization of SiGe Graded Buffer Defectivity and Throughput by Means of High Growth Temperature and Pre-Threaded Substrates

Published

Author(s)

M Erdtmann, M T. Currie, Joseph Woicik, David R. Black

Abstract

Dislocation glide kinetics dictate in relaxed graded buffers a fundamental opposition between the defectivity and throughput. For state-of-the-art Si-based applications, the trade-off between defect level and wafer cost (inversely related to throughput) has made the insertion of SiGe graded buffers into production difficult. We aim to mitigate the trade-off by reporting two advances that enable simultaneous improvements in both defectivity and throughput. The first is use of a high growth temperature to allow very fast dislocation glide velocities and growth rates as high as 1.0 m/min. The second is the use of pre-threaded Si substrates, substrates with an elevated density of threading dislocations. By having dislocation nucleation controlled by uniformly distributed substrate threading dislocations, instead of unpredictable heterogeneous sources, impediments to dislocation glide, such as dislocation bundles and pile-ups, are reduced. By incorporating both advances into SiGe graded buffer epitaxy, dislocation pile-up densities are reduced by nearly three orders of magnitude, threading dislocation densities are reduced by a factor of 7.4 , and wafer throughput is increased at least 33%.
Proceedings Title
Proceedings| Fall|
Conference Dates
November 27-December 1, 2005
Conference Location
Undefined
Conference Title
MRS Meeting

Keywords

dislocation pile-up density (DPD), separtation by implementation of oxygen, SiGe graded buffer, SIMOX

Citation

Erdtmann, M. , Currie, M. , Woicik, J. and Black, D. (2006), Optimization of SiGe Graded Buffer Defectivity and Throughput by Means of High Growth Temperature and Pre-Threaded Substrates, Proceedings| Fall|, Undefined (Accessed April 14, 2024)
Created November 15, 2006, Updated October 12, 2021