Metrology for the Electrical Characterization of Semiconductor Nanowires

Published

November 1, 2008

Author(s)

Curt A. Richter, Hao Xiong, Xiaoxiao Zhu, Wenyong Wang, Vincent M. Stanford, Woong-Ki Hong, Takhee Lee, D. E. Ioannou, Qiliang Li

Abstract

Nanoelectronic devices based upon self-assembled semiconductor nanowires are excellent research tools for investigating the behavior of structures with sub-lithographic features as well as a promising basis for future information processing technologies. New test structures and associated electrical measurement methods are the primary metrology needs necessary to enable the development, assessment, and adoption of emerging nanowire electronics We describe two unique approaches to successfully fabricate nanowire devices, one based upon harvesting and positioning nanowires and one based upon the direct growth of nanowires in predefined locations. Test structures are fabricated and electronically characterized to probe the fundamental properties of chemical-vapor-deposition grown silicon nanowires. Important information about current transport and fluctuations in materials and devices can be derived from noise measurements, and low frequency 1/f noise has traditionally been utilized as a quality and reliability indicator for semiconductor devices. Both low frequency 1/f noise and random telegraph signals are shown here to be powerful methods for probing trapping defects in nanoelectronic devices.

Citation

IEEE Transactions on Electron Devices

Volume

55

Issue

11

Pub Type

Journals

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Keywords

nanoelectronics, semiconductor nanowires, 1/f noise, test structures

Citation

Richter, C. , Xiong, H. , Zhu, X. , Wang, W. , Stanford, V. , Hong, W. , Lee, T. , Ioannou, D. and Li, Q. (2008), Metrology for the Electrical Characterization of Semiconductor Nanowires, IEEE Transactions on Electron Devices, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=33073 (Accessed December 13, 2024)