Author(s)
James A. Liddle, Gregg M. Gallatin
Abstract
Semiconductor chip manufacturing is by far the predominant nanomanufacturing technology in the world today. Top-down lithography techniques are used for fabrication of logic and memory chips since, in order to function, these chips must essentially be perfect. Assuring perfection requires expensive metrology. Top of the line logic sells for several hundred thousand dollars per square meter and, even though the required metrology is expensive, it is a small percentage of the overall manufacturing cost. The level of stability and control afforded by current lithography tools means that much of this metrology can be online and statistical. In contrast, many of the novel types of nanomanufacturing currently being developed will produce products worth only a few dollars per square meter. To be cost effective, the required metrology must cost proportionately less. Fortunately many of these nanofabrication techniques, such as block copolymer self-assembly, colloidal self-assembly, DNA origami, roll-2-roll nano-imprint, etc, will not require the same level of perfection to meet specification. Given the variability of these self-assembly processes, in order to maintain process control, these techniques will require some level of real-time online metrology. Hence we are led to the conclusion that future nanomanufacturing may well necessitate "cheap" nanometer scale metrology which functions in real time and on-line, e.g. at GHz rates, in the production stream. In this paper we review top-down and bottom-up nanofabrication techniques and compare and contrast the various metrology requirements.
Keywords
lithography, nanofabrication, nanomanufacturing, self-assembly
Citation
Liddle, J.
and Gallatin, G.
(2011),
Lithography, Metrology and Nanomanufacturing, Nanoscale, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=907745 (Accessed April 25, 2026)
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