Highly Contrasting Static Charging and Bias Stress Effects in Pentacene Transistors with Polystyrene Heterostructures Incorporating Oxidizable N,N'-Bis(4-Methoxyphenyl)aniline Side Chains as Gate Dielectrics
Qingyang Zhang, Tejaswini S. Kale, Evan Plunkett, Wei Shi, Brian Kirby, Daniel H. Reich, Howard E. Katz
Charge trapping and storage in polymer dielectrics can be harnessed for the control of semiconductor device behavior, including organic transistors. For example, gate insulators chosen for organic transistors have an important effect on both bias stress susceptibility and threshold voltage (Vth), and charging these layers can preset the operating voltages and control bias stress effects. In this paper, we describe a chemical design and film fabrication procedure that enables the construction of stacks of polystyrene (PS) layers, each with arbitrary concentrations of potentially chargeable functional groups. Thermal crosslinking of benzocyclobutene submits ensures layer integrity while keeping the layers free of polar functionality and small molecule byproducts. Neutron reflectivity (NR), scanning electron microscopy, and atomic force microscopy (AFM) revealed the morphologies of single layers, bilayers, and trilayers of the PS-based polymers. Individual layer thickness, demonstrating formation of distinct layers with minimal roughness or intermixing. The PS-based materials were used as the sole gate dielectrics for pentacene organic field-effect transistors (OFETs). We compared the OFET Vth values before and after charging. During charging, the gate electrode serves as one 'plate' of a parallel plate capacitor, and the pentacene film serves as the other. Maximum drain currents (Id) observed from output and transfer curves were essentially identical, indicating minimal effects of bias stress on individual measurements. Increased bias stress stability as evidenced by reduced Vth shift was seen in devices with trilayer dielectrics with substituted PS as the middle layer compared to a dielectric made from unsubstituted PS. On the other hand, increased Vth shift was seen in many devices with bilayer dielectrics made with substituted PS as the top layer, indicating an increase in the dielectric charge capturing ability from the substituents. We attribute the decreased Vth seen in trilayer devices to an increased dielectric polarization of the substituted PS in the middle layer that countered the charge trapping effect in the top layer. This demonstration establishes a method for utilizing vertical charge patterns for various electronics applications.
, Kale, T.
, Plunkett, E.
, Shi, W.
, Kirby, B.
, Reich, D.
and Katz, H.
Highly Contrasting Static Charging and Bias Stress Effects in Pentacene Transistors with Polystyrene Heterostructures Incorporating Oxidizable N,N'-Bis(4-Methoxyphenyl)aniline Side Chains as Gate Dielectrics, Macromolecules, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=924923
(Accessed February 28, 2024)