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Fabrication and Electrical Characterization of Fully CMOS Si Single Electron Devices

Published

Author(s)

Panu J. Koppinen, Michael Stewart, Neil M. Zimmerman

Abstract

We present electrical data of silicon single electron devices fabricated with CMOS techniques and protocols. The easily tuned devices show clean Coulomb diamonds at T = 30 mK and charge offset drift of 0.01 e over eight days. In addition, the devices exhibit robust transistor characteristics including uniformity within about 0.25 V in the threshold voltage, gate resistances greater than 10 GΩ, and immunity to dielectric breakdown in electric fields as high as 4 MV/cm. These results highlight the benefits in device performance of a fully CMOS process for single electron device fabrication
Citation
Journal of Applied Physics

Keywords

Coulomb blockade, single electron tunneling, quantum dots, electronic transport, mesoscopic systems

Citation

Koppinen, P. , Stewart, M. and Zimmerman, N. (2012), Fabrication and Electrical Characterization of Fully CMOS Si Single Electron Devices, Journal of Applied Physics, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=911577 (Accessed June 22, 2024)

Issues

If you have any questions about this publication or are having problems accessing it, please contact reflib@nist.gov.

Created December 18, 2012, Updated October 12, 2021