Discrete charge states in nanowire flash memory with multiple Ta2O5 charge-trapping stacks

Published

June 9, 2014

Author(s)

Hao Zhu, John E. Bonevich, Haitao Li, Hui H. Yuan, Oleg A. Kirillov, Qiliang Li

Abstract

In this work, multi-bit Flash memory based on self-aligned Si nanowire field-effect transistor and multiple Ta2O5 charge-trapping layers have been fabricated and fully characterized. The memory cells exhibited staircase, discrete charged states at small gate voltages. Such discrete multi-bit on one memory cell is attractive for high memory density. These novel non-volatile memory devices exhibited fast programming/erasing speed, excellent retention and endurance, indicating the advantages of integrating the multilayer of charge-storage stacks on the nanowire channel. Such high-performance Flash-like non-volatile memory can be integrated into the microprocessor chip as the local memory which requires high density and good endurance.

Citation

Applied Physics Letters

Volume

104

Issue

23

Pub Type

Journals

Keywords

nanoelectronics, nanowire, memory, FLASH memory, non-volatile memory, advanced electronics

Citation

Zhu, H. , Bonevich, J. , Li, H. , Yuan, H. , Kirillov, O. and Li, Q. (2014), Discrete charge states in nanowire flash memory with multiple Ta2O5 charge-trapping stacks, Applied Physics Letters (Accessed May 16, 2026)

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