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Discrete charge states in nanowire flash memory with multiple Ta2O5 charge-trapping stacks



Hao Zhu, John E. Bonevich, Haitao Li, Hui H. Yuan, Oleg A. Kirillov, Qiliang Li


In this work, multi-bit Flash memory based on self-aligned Si nanowire field-effect transistor and multiple Ta2O5 charge-trapping layers have been fabricated and fully characterized. The memory cells exhibited staircase, discrete charged states at small gate voltages. Such discrete multi-bit on one memory cell is attractive for high memory density. These novel non-volatile memory devices exhibited fast programming/erasing speed, excellent retention and endurance, indicating the advantages of integrating the multilayer of charge-storage stacks on the nanowire channel. Such high-performance Flash-like non-volatile memory can be integrated into the microprocessor chip as the local memory which requires high density and good endurance.
Applied Physics Letters


nanoelectronics, nanowire, memory, FLASH memory, non-volatile memory, advanced electronics
Created June 9, 2014, Updated June 6, 2017