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Hybrid Ferromagnetic-Superconductor Memory

Summary

The fields of spintronics and superconductivity are typically considered to be incompatible. Spintronic devices incorporate spin-polarized currents and magnetic fields, both of which act to inhibit superconducting transport, at least to a significant degree. However, from a technological perspective, these effects also provide a means to control the superconductivity in a ferromagnet-superconductor hybrid structure. The Spin Electronics Group is developing metrology to better understand how superconducting currents interact with ferromagnetic materials and how those interactions can be harnessed to create non-volatile and energy-efficient cryogenic memory elements, which is a necessity for developing large-scale superconducting computing.

Description

The core of the research program is to understand how the transit of a supercurrent through a series of ferromagnetic films affects both its amplitude, phase, and spin state, which can result from magnetic fields within the element, interfacial spin-filtering effects, and exchange interactions within the layers. NIST researchers are developing metrologies to quantify how each of these contributes to the superconducting transport in hybrid memory devices, most recently as part of the IARPA Cryogenic Computing Complexity program, which aims to incorporate such devices with single flux quantum electronics, see https://www.iarpa.gov/index.php/research-programs/c3. The main focus is on the spin-filtering and the exchange interaction because the effects associated with these may be scalable to nanoscale devices, whereas the magnetic field effect is not. They are also developing methods to understand basic superconducting spin physics occurring within these structures, such as converting conventional “spin-singlet” states to unconventional “spin-triplet” states.

Major Accomplishments

Ferromagnet-Based Josephson-Junction Memory for Superconducting Computing

Large-scale computing will increasingly be used to model complex systems such as weather and climate, biology, astronomy, finance and economics, weapons simulations, and cryptography. However, completely new computer architectures will be required to achieve high clocking speeds and low energy dissipation. The Intelligence Advanced Research Projects Activity (IARPA) is considering superconducting computing as a promising technology for large-scale computing and has started a multiyear program to investigate its viability. One major hurdle is the lack of a nonvolatile memory element that is scalable (down to nanometers), fast (on the order of nanoseconds), and energy efficient (consuming femtojoules).

In collaboration with the Quantum Voltage Group, we are incorporating nanoscale, nonvolatile, ferromagnetic memory elements similar to STT-MRAM devices into Josephson junctions (JJs) for superconducting supercomputing. This combines two disparate disciplines that are generally mutually exclusive since spin polarized currents are generally not compatible with Cooper-pair electron transport in superconductors. Because of this, the field has a significant need for basic, cross-disciplinary metrological advances. For instance, the JJ critical current in these structures depends on the state of the memory element (P or AP), and hence the critical current can be used to interrogate the memory state. However, the microscopic magnetic reasons for this were, until recently, unclear. Through a series of careful measurements we determined that the change of the JJ critical current depended on the ferromagnetic exchange interactions in the memory element and not stray magnetic fields. This is a fundamental advance in this emerging field because the exchange interaction is scalable to the nanoscale whereas the effects of stray fields are not. We recently showed that the same energy-efficient STT effect exploited in room temperature memory can also be utilized in their superconducting counterparts.

Publications

High-Frequency, Variable-Temperature, Automated Electrical Probes for High-Performance Computing

Researchers in the Quantum Electromagnetics Division’s Spin Electronics Group developed an automated, scanned, electrical probe system to characterize four-terminal nanodevices at high frequency (40 GHz) and variable temperature (4 K to 300 K) in the presence of a magnetic field. They used a cross-correlation machine-vision technique using video-rate images from an optical microscope. Controlled motion over this range of temperatures in the presence of a magnetic field is not easily accomplished through conventional techniques (e.g., encoders) because motion over such a wide range of temperatures typically involves hysteresis within the electrical/optical feedback system. Commercially available encoders operating at 4 K have a repeatability of only 1 micrometer to 2 micrometers, whereas the cross-correlation technique enables 10 times better resolution. This improvement will be advantageous in the future as the system is expanded to allow for calibrated two-dimensional imaging at low temperature in a magnetic field.

As an initial proof-of-concept, a 5 mm x 5 mm chip with 120 devices was electrically characterized at both 300 K and 4 K. The system can easily acquire and compare temperature-dependent statistical distributions of device behavior for any set of devices, which is important for the development of advanced computing architectures. The apparatus leverages the infrastructure developed in the Quantum Electromagnetics Division for IARPA’s Cryogenic Computing Complexity (C3) program.

The automated control of the nanopositioners will enable calibrated two-dimensional scans of the magnetic and electrical characteristics of cryogenic computing devices. A video clip shows fully automated probes electrically testing a small subset of devices provided by performers in the C3 program, but the optical feedback technique has been demonstrated on much larger arrays.

The work was supported by a NIST SERI grant for research on “Metrology for High-Performance Superconducting Computing,” in support of the National Strategic Computing Initiative.

Created February 5, 2018, Updated March 14, 2018