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Emerging Hardware for Artificial Intelligence

Summary

Designing artificial intelligence (AI) from the device up could unlock improvements in critical metrics such as energy delay product and enable unique networks that would potentially be too cumbersome to train using an algorithmic approach. We are investigating (fabricating, measuring, and modeling) novel devices for this biologically inspired approach to computing. Devices of interest include hybrid magnetic-superconducting devices, which have many properties that make them a natural choice for bio-inspired computing. For example, Josephson junctions can produce a voltage spike that is analogous to the action potential produced by a neuron in the brain, except at a time scale that is nearly 8 orders of magnitude faster. Another set of devices of interest are magnetic tunnel junctions. These devices could potentially exploit the thermal energy present in the system to aid in probabilistic style computations. The underlying goal of this effort is to find a way to let the physics of the devices do the work of the computation.

Description

Here is a brief description of our work with links to recent papers from our investigations, broadly classified as experimental and modeling. A brief overview of Josephson junction-based bio-inspired computing can be found in our review article.

circuit
Magnetic Josephson junction test chip fabricated at NIST

Experimental

We have facilities to develop our devices from the materials level up. These include dedicated superconducting and magnetic deposition systems, and tools to fabricate sub-50 nm devices and high-complexity circuits in the Boulder Microfabrication Facility (clean room). In addition, we have advanced, high speed (50 GHz) electrical test measurement facilities and expertise for both room temperature and cryogenic devices.

We recently demonstrated hybrid magnetic-superconducting devices that can be used as artificial synapses in a superconducting bio-inspired computational system. These devices are able to provide a near-analog weight for superconducting circuits that is both trainable and non-volatile while working at an extremely low energy scale (sub-attojoule).

graph illustration
Change in Josephson critical current in a magnetic Josephson junction. (Left) Data of the voltage-current characteristic taken at 4 K on a 10-μm-diameter magnetic Josephson junction synapse in the magnetically disordered state. Lower Inset: Simulated voltage spike train above Ic; the average of the spike train results in the measured quasi-static voltage measured. (Right) Data of the voltage versus current characteristic taken at 4 K on the same 10-μm-diameter JJ synapse in the magnetically ordered state.
stochastic oscillator MTJs
Scanning electron micrograph of spin torque oscillator device array used for nonBoolean computation.

We have also investigated computation using magnetic devices as spin-torque oscillator arrays to do nonBoolean computation. The phase locking dynamics of these coupled oscillator arrays were map on to important computational primitives for image recognition, such as convolution operations and degree-of-match (distance) approximation. We are currently exploring stochastic oscillator MTJs to perform such tasks in a different, potentially lower energy manner.

Modeling

We have used superconducting SPICE simulations to physically model Josephson junction based artificial neural networks that can solve a 9-pixel classification problem. In further simulations, we have found that such networks have the potential to run at speeds in excess of 100 GHz.

We have confirmed that the SPICE models that we are using accurately predict the performance of synaptic circuits that we developed, giving us greater confidence in using these modeling tools to explore new architectures.

illustration
Block diagram of a SPICE simulated Josephson junction based neural network trained to identify 9 pixel images.

We have performed SPICE simulations to investigate scaling limits of superconducting architectures. We find no fundamental limitation on the fan-out level and digital communications, meaning that any limitations there will likely result from size considerations and can scale with Josephson junction fabrication advances.

 

 

simulation
Design layout of a synaptic Josephson junction circuit and inset optical image of the test chip inset fabricated at MIT Lincoln Laboratory.
graph
Simulations of fan-in and threshold firing of a Josephson junction neuron operating at 25 GHz.  (a) Schematic of flux-based fan-in loop and re-amplification. (b) Fan-in loop response to a single full weight spiking event for a fan-in of 128-to-1. Black trace shows the current across one of the coupling inductors LSQ_1, the red trace shows the current across Lout_0, and the blue trace shows the current after re-amplification at Lout_3. (c) shows the phase across JJSQ_2 as it emits single flux quantum pulses into the re-amplification circuit.

Opportunities:

We currently have opportunities for postdocs and graduate students. We also have opportunities for postdoctoral fellows through the National Research Council Associateship Program.

Related Publications

Created January 29, 2021, Updated September 17, 2024