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ReRAM/CMOS Array Integration and Characterization via Design of Experiments

Published

Author(s)

Imtiaz Hossen, William Borders, Advait Madhavan, Shweta Joshi, Patrick Braganca, Jabez McClelland, Brian Hoskins, Gina Adam

Abstract

No two fabricated ReRAM devices are alike. This experimental reality is evident when large device arrays have to be characterized and optimized for system-level performance. Each device can have their individual optimal set of operating parameters that gives the best performance. However, in an array each device needs to be measured in similar operating settings. Therefore, it is necessary to find the optimal settings where most devices will have the best performance across the entire array population. Traditional sampling methods of DoE, such as a full factorial design approach, require a large number of tests within an experimental space, which is time-intensive and resource-draining. As an alternative, this study proposes the adoption of the Latin square method under the Design of Experiments (DoE) framework for the characterization and performance optimization of arrays of ReRAM devices. This innovative approach drastically reduces the number of experimental tests, thereby offering a faster way to discern the impact of each factor and finetune device parameters effectively. The core objective of employing this DoE technique is to harness its potential for optimizing parameters that significantly enhance the ON/OFF ratio and endurance of ReRAM devices. The optimization technique, performed on a CMOS-integrated 20k array of ReRAM devices, increases the device yield around 84%, compared to the previous integration with an unoptimized technique.
Citation
Advanced Electronic Materials

Keywords

Memristor, CMOS integration, Design of experiments

Citation

Hossen, I. , Borders, W. , Madhavan, A. , Joshi, S. , Braganca, P. , McClelland, J. , Hoskins, B. and Adam, G. (2025), ReRAM/CMOS Array Integration and Characterization via Design of Experiments, Advanced Electronic Materials, [online], https://doi.org/10.1002/aelm.202500203, https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=958033 (Accessed March 15, 2026)

Issues

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Created July 21, 2025, Updated March 13, 2026
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