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Vertical Insulated Gate Bipolar Transistor Lumped Model and Saber Simulator Implementation

Published

Author(s)

Allen R. Hefner Jr.
Citation
Talk/Video for NTU Satellite Course

Citation

Hefner, A. (1994), Vertical Insulated Gate Bipolar Transistor Lumped Model and Saber Simulator Implementation, Talk/Video for NTU Satellite Course (Accessed April 14, 2024)
Created May 1, 1994, Updated February 19, 2017