Using photolithographically defined implant wires for electrical connections, we demonstrate measurement of a scanning tunneling microscope (STM) patterned nanoscale electronic device on Si(100), eliminating the onerous alignment procedures and electron beam lithography commonly in use now. Eliminating these difficult and expensive steps can improve measurement productivity and yields for existing groups as well providing access to this field for many more researchers in smaller efforts. Electrical contact to the nanodevices is achieved by implanting patterned, degenerately doped wires in the substrate using photolithography and commercial low energy ion implantation. We bring several, isolated, implanted wires to within the STM scanners field of view ( 10 mm10 mm) where the STM can detect and smoothly draw contiguous patterns for electrical connections directly to these implant lines. After the STM pattern is phosphine doped and overgrown with silicon, photolithopraphy is then used again to align ( 160 mm)2 aluminum contact pads onto ( 200 mm)2 implanted areas at the ends of the wires. In order to determine how closely the wires could be oriented and maintain electrical isolation after heating to > 1200 C, which is required to prepare silicon surfaces for STM patterning, we prepared test implants with varying gap spacings for measurement. We present detailed results on the diffusion impact from the high temperature processing, identify optimal implant line spacings, demonstrate the ability to accurately locate implanted regions using STM and then pattern and measure an STM drawn nanowire electrically contacted via this technique.
Citation: Nature - Scientific Reports
Pub Type: Journals
nanowire, STM lithogaphy, ion implantation