Richard M. Silver, James E. Potzick, Robert D. Larrabee
The relative misalignment of features produced by different mask levels (i.e., overlay error) is projected to become an increasingly important problem to the semiconductor industry as the size of the critical features continues to decrease. In response to this need, NIST has initiated a two-step program to improve the measurement of overlay error, and to develop standards in support of overlay metrology. The approach of the first step is to develop a toolkit of standards for characterizing the tool-induced shifts (TIS) in the optical tools presently used for the measurement of overlay error, with the aim of producing and maintaining overlay tools with negligible TIS. The second step, which necessarily follows the successful completion of the first step, is aimed at developing artifact standards with negligible wafer-induced shifts for the calibration of the TIS-free overlay tools.
Proceedings of SPIE
February 20, 1995
Santa Clara, CA, USA
Integrated Circuit Metrology, Inspection, and Process Control IX, Marylyn H. Bennett, Editor May 1995, Overlay and Registration