A Local Oscillator for Chip-Scale Atomic Clocks at NIST

Published

June 5, 2006

Author(s)

Alan Brannon, J Breitbarth, Z Popovic, Vladislav Gerginov, V Shah, Svenja A. Knappe, Leo W. Hollberg, John E. Kitching

Abstract

We report the first local oscillator (LO) demonstrating viability in terms of performance, size, and power, for chip-scale atomic clocks (CSAC) at the National Institute of Standards and Technology in Boulder, CO. This volgate-controlled oscillator (VCO) achieves the lowest combined size, DC power consumption, phase noise, and thermal frequency drift among those previously reported, while achieving a tuning range large enough to compensate for part tolerances but small enough to permit precision locking to an atomic resonance. We discuss the design of the LO and the integration with the NIST physics package.

Proceedings Title

Proc. Freq. Cont. Symp

Conference Dates

June 5-7, 2006

Conference Location

Miami, FL

Conference Title

IEEE Intl. Freq. Cont. Symp.

Pub Type

Conferences

Download Paper

Local Download

Keywords

chip scale atomic clocks, CSAC, VCO, VCSEL, voltage controlled oscillator

Citation

Brannon, A. , Breitbarth, J. , Popovic, Z. , Gerginov, V. , Shah, V. , Knappe, S. , Hollberg, L. and Kitching, J. (2006), A Local Oscillator for Chip-Scale Atomic Clocks at NIST, Proc. Freq. Cont. Symp, Miami, FL, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=50388 (Accessed December 3, 2024)