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A Local Oscillator for Chip-Scale Atomic Clocks at NIST



Alan Brannon, J Breitbarth, Z Popovic, Vladislav Gerginov, V Shah, Svenja A. Knappe, Leo W. Hollberg, John E. Kitching


We report the first local oscillator (LO) demonstrating viability in terms of performance, size, and power, for chip-scale atomic clocks (CSAC) at the National Institute of Standards and Technology in Boulder, CO. This volgate-controlled oscillator (VCO) achieves the lowest combined size, DC power consumption, phase noise, and thermal frequency drift among those previously reported, while achieving a tuning range large enough to compensate for part tolerances but small enough to permit precision locking to an atomic resonance. We discuss the design of the LO and the integration with the NIST physics package.
Proceedings Title
Proc. Freq. Cont. Symp
Conference Dates
June 5-7, 2006
Conference Location
Miami, FL
Conference Title
IEEE Intl. Freq. Cont. Symp.


chip scale atomic clocks, CSAC, VCO, VCSEL, voltage controlled oscillator


Brannon, A. , Breitbarth, J. , Popovic, Z. , Gerginov, V. , Shah, V. , Knappe, S. , Hollberg, L. and Kitching, J. (2006), A Local Oscillator for Chip-Scale Atomic Clocks at NIST, Proc. Freq. Cont. Symp, Miami, FL, [online], (Accessed July 21, 2024)


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Created June 5, 2006, Updated February 19, 2017