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On-Chip Temperature Distribution for Josephson Voltage Standards

Published

Author(s)

Anna E. Fox, Evan B. Golden, Paul D. Dresselhaus, Samuel P. Benz

Abstract

A substrate surface temperature characterization for the National Institute of Standards and technology Josephson voltage standard has been performed by fabricating and measuring Josephson junction arrays with on-chip thermometry. Circuits were designed with a single voltage standard style array consisting of 12810 junctions with 31 banks of thermometer junctions placed around the array and termination resistor to monitor temperature via junction critical current measurement. Temperature rise in devices with on-chip termination resistors were compared to that of devices terminated off-chip. The thermal profiles on several different substrates were measured and compared to determine which substrate exhibited the best thermal transport. Finally, the thermal properties of junctions deposited directly on silicon were compared to those of junctions deposited on an interface layer. We found that devices with off-chip terminations had half the temperature rise compared to devices with on-chip termination, and devices with remotely located terminations exhibited larger quantized voltage steps over a larger frequency/power range than devices with termination resistors very close to array junctions. Comparing substrates, we found that sapphire was best for transporting heat from voltage standard circuits and that the interface layer did not affect heat transport in the substrate.
Citation
IEEE Transactions on Applied Superconductivity
Volume
27
Issue
4

Citation

Fox, A. , Golden, E. , Dresselhaus, P. and Benz, S. (2016), On-Chip Temperature Distribution for Josephson Voltage Standards, IEEE Transactions on Applied Superconductivity, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=921704 (Accessed March 4, 2024)
Created November 22, 2016, Updated March 24, 2017