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Characterization of Paralleled Super Junction MOSFET Devices under Hard- and Soft-Switching Conditions

Published

Author(s)

X Huang, H. Yu, Jih-Sheng Lai, Allen R. Hefner Jr., David W. Berning

Abstract

The super junction (SJ) MOSFET exhibits conduction and switching properties similar to those of conventional power MOSFETs. In this paper we investigate possible benefits and problems associated with connecting SJ MOSFET in parallel for high-power applications. Measured circuit performances of paralleled SJ MOSFET devices are evaluated under hard- and soft-switching conditions. The measurements include (1) turn-on and turn-off switching voltage and current comparison, (2) gate driver resistance effects on current sharing between paralleled SJ MOSFET devices, and (3) SJ MOSFET body diode behavior under hard- and soft-switching conditions. Two test circuits are developed for paralleled SJ MOSFET evaluation. One is an auxiliary resonant snubber chopper for the near zero-voltage switching test, and the other one is an auxiliary resonant snubber inverter for the true zero-voltage condition test. Experiment results indicate that SJ MOSFET can be paralleled without the need for precise device matching if the gate rive resistances are closely matched.
Proceedings Title
Proc., Power Electronics Specialist Conference
Conference Dates
June 17-22, 2001
Conference Location
Vancouver, 1, CA

Keywords

SJ MOSFET, soft-switching, high-power converters, super junction MOSFET, MOSFET

Citation

Huang, X. , Yu, H. , Lai, J. , Hefner Jr., A. and Berning, D. (2001), Characterization of Paralleled Super Junction MOSFET Devices under Hard- and Soft-Switching Conditions, Proc., Power Electronics Specialist Conference, Vancouver, 1, CA, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=7703 (Accessed July 20, 2024)

Issues

If you have any questions about this publication or are having problems accessing it, please contact reflib@nist.gov.

Created June 29, 2001, Updated October 12, 2021