Asymmetric Energy Distribution of Interface Traps in n- & p- MOSFETs with HfO2 Gate Dielectric on Ultra-thin SiON Buffer Layer

Published

March 1, 2004

Author(s)

Jin-Ping Han, Eric M. Vogel, Evgeni Gusev, C. D'Emic, Curt A. Richter, Da-Wei Heh, John S. Suehle

Abstract

The variable rise/fall-time charge pumping technique has been used to determine the energy distribution of interface trap density (Dit) in MOSFETs with HfO2 gate dielectric grown on ultra-thin (1-2 monolayer) SiON buffer layer on Si. Our results have revealed that the Dit is higher in the upper half of the bandgap than that in the lower half of the bandgap, and are consistent with qualitative results obtained by the subthreshold I-V measurements, capacitance-voltage and ac conductance techniques. These results are also consistent with the observation that n-channel mobilities are more severely degraded than p-channel mobilities when compared to conventional MOSFET's with SiO2 or SiON as the gate dielectric.

Citation

Electron Device Letters

Volume

25

Issue

3

Pub Type

Journals

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Keywords

charge pumping, energy distribution, interface trap density, subthreshold characteristics, high-k gated MOSFETs

Citation

Han, J. , Vogel, E. , Gusev, E. , D'Emic, C. , Richter, C. , Heh, D. and Suehle, J. (2004), Asymmetric Energy Distribution of Interface Traps in n- & p- MOSFETs with HfO2 Gate Dielectric on Ultra-thin SiON Buffer Layer, Electron Device Letters, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=31451 (Accessed December 14, 2024)