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Advait Madhavan

Advait Madhavan is a UMD Faculty Specialist in the Alternative Computing Group in the Nanoscale Device Characterization Division of the Physical Measurement Laboratory (PML). He received a Ph.D. in Electrical and Computer Engineering from the University of California, Santa Barbara and is  currently working with Mark Stiles and Jabez McClelland. His interests lie in various brain inspired approaches to computation such as temporal, analog and stochastic codes. His expertise lies in VLSI, with the objective of  building chips to interface with emerging technologies in order to realize these unconventional computing paradigms.

Selected Publications

  • Race logic: Abusing hardware race conditions to perform useful computation, Madhavan, A., Sherwood, T., & Strukov, D., EEE Micro: Micro's Top Picks from Computer Architecture Conferences35(3), 48-57 (2015).
  • Race logic: A hardware acceleration for dynamic programming algorithms, Madhavan, A., Sherwood, T., & Strukov, D., ACM SIGARCH Computer Architecture News42(3), 517-528 (2014).
  • A 4-mm 2 180-nm-CMOS 15-Giga-cell-updates-per-second DNA sequence alignment engine based on asynchronous race conditions, Madhavan, A., Sherwood, T., & Strukov, D., In Custom Integrated Circuits Conference (CICC), 2017 IEEE (pp. 1-4). IEEE (2017, April).


Streaming Batch Eigenupdates for Hardware Neural Networks

Brian D. Hoskins, Matthew W. Daniels, Siyuan Huang, Advait Madhavan, Gina C. Adam, Nikolai B. Zhitenev, Jabez J. McClelland, Mark D. Stiles
Neuromorphic networks based on nanodevices, such as metal oxide memristors, phase change memories, and flash memory cells, have generated considerable interest

A Truth-Matrix View into Unary Computing

Advait Madhavan, Georgios Tzimpragos, Mark D. Stiles, Timothy Sherwood
Our community has been exploring Time-of-arrival based codes as a candidate for very low energy information processing. A ``space-time'' algebra has been
Created August 15, 2019, Updated June 12, 2020